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    Low drift voltage reference
    2.
    发明授权
    Low drift voltage reference 有权
    低漂移电压基准

    公开(公告)号：US09448579B2

    公开(公告)日：2016-09-20

    申请号：US14136774

    申请日：2013-12-20

    Applicant: Analog Devices Global

    Inventor： Stefan Marinca

    IPC: G05F3/18

    CPC classification number: G05F3/185

    Abstract: Circuits and method for providing voltage reference circuits that include low drift over time and lower operating voltages are provided. Generally, it is desirable that a reference circuit provide an accurate and precise reference over time. The voltage reference circuits described can provide for good long term stability, operation at lower voltages than prior designs, consistent output voltage with reduced variability due to process changes and mismatches, low noise in the reference voltage, and other advantages.

    Abstract translation: 提供用于提供包括随时间的低漂移和较低工作电压的电压参考电路的电路和方法。 通常，期望参考电路随时间提供精确和精确的参考。 所描述的电压参考电路可以提供良好的长期稳定性，在比以前的设计更低的电压下操作，一致的输出电压由于过程变化和不匹配而降低的可变性，参考电压中的低噪声以及其它优点。

    Circuit arrangement for regulating a voltage
    3.
    发明申请
    Circuit arrangement for regulating a voltage 失效
    用于调节电压的电路布置

    公开(公告)号：US20030067288A1

    公开(公告)日：2003-04-10

    申请号：US10242286

    申请日：2002-09-11

    Applicant: Semikron Elektronik GmbH

    Inventor： Stefan Schmitt ,  Roland Bittner

    IPC: G05F001/40

    CPC classification number: G05F3/185

    Abstract: A voltage-regulating circuit uses a combination of a longitudinal regulator circuit with a switched charge-pumping circuit. The longitudinal regulator circuit contains a transistor, a first resistor, and a zener diode. The charge-pumping circuit has a second resistor, a capacitor and a switched voltage source lying in series between the output potential of the voltage-regulating circuit and a chassis ground potential. The anode of a diode is connected to a point between the second resistor and the capacitor, while the cathode of the diode is connected to the controlling signal input of the transistor.

    Abstract translation: 电压调节电路使用纵向调节器电路与开关式电荷泵浦电路的组合。 纵向调节器电路包含晶体管，第一电阻器和齐纳二极管。 电荷泵浦电路具有串联在电压调节电路的输出电位和底盘接地电位之间的第二电阻器，电容器和开关电压源。 二极管的阳极连接到第二电阻器和电容器之间的点，而二极管的阴极连接到晶体管的控制信号输入端。

    Bias voltage and constant current supply circuit
    4.
    发明授权
    Bias voltage and constant current supply circuit 失效
    偏置电压和恒流供电电路

    公开(公告)号：US4808909A

    公开(公告)日：1989-02-28

    申请号：US108745

    申请日：1987-10-15

    Applicant: Dennis N. Eddlemon

    Inventor： Dennis N. Eddlemon

    IPC: G05F3/18 ,  G05F3/16

    CPC classification number: G05F3/185

    Abstract: A circuit for providing a constant current and a constant bias voltage is described. The circuit includes two paths coupled between a positive voltage supply +V.sub.S and a negative voltage supply -V.sub.S. Each path inlcudes a Zener diode and a enhancement mode field effect transistor (FET) device (the FET device being coupled in a diode configuration) which are connected in series. Each path of the circuit further includes an FET device and an associated resistor combination, coupled in series with the Zener diode and the diode-coupled FET device. The FET device and the associated resistor function as a current source component. A gate terminal of each FET device of the current source component is coupled across the Zener diode and the diode-coupled FET device of the other circuit path. This cross-coupling between the two paths provides compensation, in addition to that provided by the Zener diode characteristics, for variations in circuit parameters, such as changes in the voltage supplies, thereby permitting a stable bias voltage to be generated.

    Abstract translation: 描述了用于提供恒定电流和恒定偏置电压的电路。 电路包括耦合在正电源+ VS和负电压-VS之间的两个路径。 每个路径包括串联连接的齐纳二极管和增强型场效应晶体管（FET）器件（FET器件以二极管配置耦合）。 电路的每个路径还包括与齐纳二极管和二极管耦合FET器件串联耦合的FET器件和相关联的电阻器组合。 FET器件和相关电阻器用作电流源组件。 电流源组件的每个FET器件的栅极端子跨越齐纳二极管和另一个电路路径的二极管耦合的FET器件耦合。 这两个路径之间的这种交叉耦合除了由齐纳二极管特性所提供的之外还提供补偿电路参数的变化，例如电压供应的变化，从而允许产生稳定的偏置电压。

    Reference voltage circuit
    5.
    发明授权
    Reference voltage circuit 有权
    参考电压电路

    公开(公告)号：US09477251B2

    公开(公告)日：2016-10-25

    申请号：US14842179

    申请日：2015-09-01

    Applicant: FUJI ELECTRIC CO., LTD.

    Inventor： Masashi Akahane

    IPC: G05F3/18

    CPC classification number: G05F3/185 ,  G05F3/18

    Abstract: A reference voltage circuit including a constant voltage circuit and a resistance voltage divider circuit. The constant voltage circuit includes a Zener diode, and a bias current circuit connected in series with the Zener diode and causing a constant current to flow into the Zener diode. The resistance voltage divider circuit is connected in parallel with the Zener diode, and includes first and second resistors connected in series. The first resistor is connected to a cathode side of the Zener diode, and is formed of a low temperature coefficient resistor body that is temperature-independent. The second resistor is connected to an anode side of the Zener diode, and is formed of a resistor body having temperature characteristics that are the reverse of output temperature characteristics of the Zener diode.

    Abstract translation: 一种参考电压电路，包括恒压电路和电阻分压电路。 恒压电路包括齐纳二极管和与齐纳二极管串联连接并使恒定电流流入齐纳二极管的偏置电流电路。 电阻分压器电路与齐纳二极管并联连接，并包括串联连接的第一和第二电阻器。 第一个电阻连接到齐纳二极管的阴极侧，由与温度无关的低温系数电阻体构成。 第二电阻器连接到齐纳二极管的阳极侧，并且由具有与齐纳二极管的输出温度特性相反的温度特性的电阻体形成。

    Voltage generator and bandgap reference circuit
    6.
    发明授权
    Voltage generator and bandgap reference circuit 有权
    电压发生器和带隙参考电路

    公开(公告)号：US08933684B2

    公开(公告)日：2015-01-13

    申请号：US13603406

    申请日：2012-09-04

    Applicant: Hui Wang ,  Yin Liu ,  Jun Xiang ,  Huaming Chong

    Inventor： Hui Wang ,  Yin Liu ,  Jun Xiang ,  Huaming Chong

    IPC: G05F3/16 ,  G05F3/18

    CPC classification number: G05F3/16 ,  G05F3/185 ,  G05F3/245

    Abstract: A voltage generator includes a first transistor, a second transistor, an operational amplifier, a capacitor, a third transistor, a fourth transistor and a first resistor. The operational amplifier includes a first terminal coupled to a second terminal of the first transistor, and a second terminal coupled to a second terminal of the second transistor. The capacitor is coupled between an output terminal of the operational amplifier and a ground terminal. The third transistor is coupled to the first transistor and the output terminal of the operational amplifier. The fourth transistor is coupled to the second transistor, the output terminal of the operational amplifier and the ground terminal. The first resistor is utilized for generating a complementary to absolute temperature voltage according to a voltage difference between a gate-source voltage of the third transistor and a gate-source voltage of the fourth transistor.

    Abstract translation: 电压发生器包括第一晶体管，第二晶体管，运算放大器，电容器，第三晶体管，第四晶体管和第一电阻器。 运算放大器包括耦合到第一晶体管的第二端子的第一端子和耦合到第二晶体管的第二端子的第二端子。 电容器耦合在运算放大器的输出端和接地端之间。 第三晶体管耦合到运算放大器的第一晶体管和输出端。 第四晶体管耦合到第二晶体管，运算放大器的输出端和接地端。 第一电阻器用于根据第三晶体管的栅源电压和第四晶体管的栅源电压之间的电压差产生与绝对温度电压的互补。

    REFERENCE VOLTAGE GENERATION CIRCUIT AND BIAS CIRCUIT
    7.
    发明申请
    REFERENCE VOLTAGE GENERATION CIRCUIT AND BIAS CIRCUIT 有权
    参考电压发生电路和偏置电路

    公开(公告)号：US20100127689A1

    公开(公告)日：2010-05-27

    申请号：US12417730

    申请日：2009-04-03

    Applicant: Kazuya Yamamoto ,  Miyo Miyashita

    Inventor： Kazuya Yamamoto ,  Miyo Miyashita

    IPC: G05F3/16 ,  G05F1/10

    CPC classification number: G05F3/185

    Abstract: A reference voltage generation circuit comprises: a first depletion mode FET; a second depletion mode FET; a first resistor; a first bipolar transistor; a second resistor; a second bipolar transistor; a third bipolar transistor; a third resistor; a third depletion mode FET having its drain connected to a second end of the first resistor and to the collector of the first bipolar transistor; and a fourth bipolar transistor having its base and collector connected to the gate and the source of the third depletion mode FET, and its emitter grounded, wherein source voltage of the second depletion mode FET is output as a reference voltage.

    Abstract translation: 参考电压产生电路包括：第一耗尽型FET; 第二耗尽型FET; 第一个电阻; 第一双极晶体管; 第二电阻器; 第二双极晶体管; 第三双极晶体管; 第三电阻; 第三耗尽型FET，其漏极连接到第一电阻器的第二端和第一双极晶体管的集电极; 以及第四双极晶体管，其基极和集电极连接到第三耗尽型FET的栅极和源极，并且其发射极接地，其中第二耗尽型FET的源极电压作为参考电压输出。

    Two-terminal monolithic voltage regulator and reach-through transistor
    8.
    发明授权
    Two-terminal monolithic voltage regulator and reach-through transistor 失效
    双端单电压稳压器和直流晶体管

    公开(公告)号：US3571630A

    公开(公告)日：1971-03-23

    申请号：US3571630D

    申请日：1968-11-04

    Applicant: NAT SEMICONDUCTOR CORP

    Inventor： WIDLAR ROBERT J

    IPC: G05F3/18 ,  H01L27/00 ,  H01L27/07 ,  H03K23/08 ,  H01L9/00

    CPC classification number: H01L27/0716 ,  G05F3/185 ,  H01L27/00

    Abstract: A double diffused transistor structure having a base region which is sufficiently thin so that the reverse breakdown voltage between the emitter and the collector (BVeco) is less than the reverse breakdown voltage between the emitter and the base (BVebo). The transistor structure is connected in an upside-down fashion as a two-terminal network, the terminals being formed by the emitter and the collector in a manner similar to that heretofore employed with Zener diodes to provide a ''''reachthrough'''' at a predetermined voltage thereacross. A circuit utilizing such a ''''reach-through'''' transistor structure connected in the upside-down fashion in conjunction with other components to operate the transistor structure at a constant current to maintain the reverse breakdown voltage constant.

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