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公开(公告)号：US09749068B2
公开(公告)日：2017-08-29
申请号：US15162465
申请日：2016-05-23
申请人： SiTune Corporation
CPC分类号： H04B17/21 , H04B17/0085 , H04B17/20 , H04B17/327 , H04L1/20 , H04L43/028
摘要： A system and method are provided for calibrating the IQ-imbalance in a low-IF receiver. A Test Signal can be generated in a mirror frequency and conveyed to the receiver. The power of the signal produced in the receiver from the conveyed Test Signal can be measured. In the absence of an IQ-imbalance, the Test Signal can be completely eliminated in the receiver and the corresponding measured power of the produced signal can be minimized. Accordingly, a two dimensional algorithm is described for calibrating a receiver and correcting the IQ-imbalance by adjusting the phase and gain difference between the I and Q channels in the receiver based on the measured power of the signal produced in the receiver.
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公开(公告)号：US09264059B2
公开(公告)日：2016-02-16
申请号：US14290695
申请日：2014-05-29
申请人： SITUNE CORPORATION
CPC分类号： H03M1/183 , H03M1/0836 , H03M1/1038 , H03M1/1215 , H03M1/46
摘要： Various embodiments describe systems and methods for calibrating gain mismatches and timing errors in and between individual ADC channels of a time-interleaved ADC. In some embodiments, a calibration signal (e.g., a DC signal) can be selectively applied to each ADC channel of a time-interleaved ADC to estimate a gain mismatch of the corresponding ADC channel. The gain mismatch can then be compensated by a gain correction circuit at the digital backend of the time-interleaved ADC. In some embodiments, timing errors between ADC channels of a time-interleaved ADC can be measured by applying a time varying signal to the ADC channels of the time-interleaved ADC. The timing errors can be calibrated by applying a feedback signal to a clock phase generator of the time-interleaved ADC.
摘要翻译： 各种实施例描述了用于校准时间交织ADC的各个ADC通道内和之间的增益失配和定时误差的系统和方法。 在一些实施例中，可以选择性地将校准信号（例如，DC信号）施加到时间交织的ADC的每个ADC通道，以估计对应的ADC通道的增益失配。 然后可以通过时间交织ADC的数字后端的增益校正电路来补偿增益失配。 在一些实施例中，可以通过对时间交织的ADC的ADC通道应用时变信号来测量时间交织ADC的ADC通道之间的定时误差。 可以通过将反馈信号施加到时间交织的ADC的时钟相位发生器来校准定时误差。
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公开(公告)号：US09209768B2
公开(公告)日：2015-12-08
申请号：US14044749
申请日：2013-10-02
申请人： SiTune Corporation
CPC分类号： H03G3/3036 , H03G1/007 , H03G3/3052 , H03G3/3063
摘要： An RF receiver is described comprising a common gate common source LNA with a variable resistor in the source of the common gate transistor, a variable resistor in the source of the common source transistor, and a variable resistor in the RF input. A Smart Gain Control varies the resistance in the resistors to produce linear amplification in the LNA while maintaining input matching. Further, a broad dynamic range RSSI is described that implements a feedback control loop to maintain signal power within a sensitivity range of the power detector in the RSSI.
摘要翻译： RF接收机被描述为包括在公共栅极晶体管的源极中具有可变电阻器的公共栅极公共源极LNA，在公共源晶体管的源极中的可变电阻器和RF输入端中的可变电阻器。 智能增益控制可以改变电阻器中的电阻，从而在保持输入匹配的同时在LNA中产生线性放大。 此外，描述了实现反馈控制回路以将信号功率维持在RSSI中的功率检测器的灵敏度范围内的宽动态范围RSSI。
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公开(公告)号：US20150326240A1
公开(公告)日：2015-11-12
申请号：US14290695
申请日：2014-05-29
申请人： SITUNE CORPORATION
CPC分类号： H03M1/183 , H03M1/0836 , H03M1/1038 , H03M1/1215 , H03M1/46
摘要： Various embodiments describe systems and methods for calibrating gain mismatches and timing errors in and between individual ADC channels of a time-interleaved ADC. In some embodiments, a calibration signal (e.g., a DC signal) can be selectively applied to each ADC channel of a time-interleaved ADC to estimate a gain mismatch of the corresponding ADC channel. The gain mismatch can then be compensated by a gain correction circuit at the digital backend of the time-interleaved ADC. In some embodiments, timing errors between ADC channels of a time-interleaved ADC can be measured by applying a time varying signal to the ADC channels of the time-interleaved ADC. The timing errors can be calibrated by applying a feedback signal to a clock phase generator of the time-interleaved ADC.
摘要翻译： 各种实施例描述了用于校准时间交织ADC的各个ADC通道内和之间的增益失配和定时误差的系统和方法。 在一些实施例中，可以选择性地将校准信号（例如，DC信号）施加到时间交织的ADC的每个ADC通道，以估计对应的ADC通道的增益失配。 然后可以通过时间交织ADC的数字后端的增益校正电路来补偿增益失配。 在一些实施例中，可以通过对时间交织的ADC的ADC通道应用时变信号来测量时间交织ADC的ADC通道之间的定时误差。 可以通过将反馈信号施加到时间交织的ADC的时钟相位发生器来校准定时误差。
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公开(公告)号：US20140294123A1
公开(公告)日：2014-10-02
申请号：US14216885
申请日：2014-03-17
申请人： SiTune Corporation
CPC分类号： H04L27/2647 , H04L5/0007 , H04L5/0023 , H04L5/0048 , H04L5/005 , H04L5/0051 , H04L25/0232 , H04L25/03821 , H04L2025/03414
摘要： A system and method is provided for estimating the channel in OFDM transmission with inter-carrier interference (ICI). A channel in a data subcarrier in a subchannel shared between pilot subcarriers and data subcarriers can be estimated by performing interpolation based on estimated channels in pilot subcarriers in the same OFDM symbol as the subcarrier, such as through spline interpolation. A second estimate of the channel in the subcarrier can be produced by averaging an estimate of the channel in a subcarrier in the subchannel in a previous OFDM symbol and an estimate of the channel in a subcarrier in the subchannel in a succeeding OFDM symbol. A third estimate of the channel in the subcarrier can be produced through a linear combination of the first estimate and the second estimate. The channel in data subcarriers can be estimated through a weighted sum of the channel in nearest subcarriers.
摘要翻译： 提供了一种用于利用载波间干扰（ICI）估计OFDM传输中的信道的系统和方法。 例如通过样条插补，可以通过在与子载波相同的OFDM符号中的导频子载波中的估计信道执行内插来估计导频子载波和数据副载波之间共享的子信道中的数据子载波中的信道。 子载波中的信道的第二估计可以通过对先前OFDM符号中的子信道中的子载波中的信道的估计和后续OFDM符号中的子信道中的子载波中的信道的估计进行平均来产生。 可以通过第一估计和第二估计的线性组合来产生子载波中的信道的第三估计。 可以通过最近子载波中的信道的加权和来估计数据子载波中的信道。
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公开(公告)号：US20140256280A1
公开(公告)日：2014-09-11
申请号：US14282575
申请日：2014-05-20
申请人： SITUNE CORPORATION
IPC分类号： H04B1/16
CPC分类号： H04B1/16 , H03F3/19 , H03F2200/135 , H03F2200/144 , H03F2200/451 , H03G3/3036 , H03G3/3068 , H03H11/1213 , H03H11/1291 , H03K5/00 , H04B1/10 , H04L25/08
摘要： A system and method is provided for filtering and amplifying a signal where amplification can be distributed between stages of a filter and gain can be assigned throughout the filter to optimize system performance. Such a system can be implemented in the baseband section of RF receivers. VGAs can be implemented between filter stages, such as biquads, or VGAs can be incorporated in filter stages. Substantially linear VGAs comprising a parallel resistor array can be incorporated in the circuitry of the filter stages to reduce distortion. Gain can be assigned dynamically in the amplification stages to improve noise and/or linearity performance. For example, gain assignments can be implemented so that high power undesired signal components are filtered out before amplification to prevent component saturation, and low power signals are amplified before they are filtered to improve noise performance.
摘要翻译： 提供了一种用于过滤和放大信号的系统和方法，其中可以在滤波器的级之间分布放大，并且可以在整个滤波器上分配增益以优化系统性能。 这样的系统可以在RF接收机的基带部分中实现。 VGA可以在滤波器级之间实现，例如二进制二进制，或者VGA可以并入滤波器级。 包括并联电阻器阵列的基本线性VGA可以并入滤波器级的电路中以减少失真。 增益可以在放大级别动态分配，以提高噪声和/或线性性能。 例如，可以实现增益分配，使得在放大之前将高功率不期望信号分量滤除，以防止元件饱和，并且低功率信号在滤波之前被放大以提高噪声性能。
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7.发明授权System and method for handling strong signals and blockers in the RF front end 有权RF前端处理强信号和阻塞的系统和方法公开(公告)号：US08565703B2
公开(公告)日：2013-10-22
申请号：US13609094
申请日：2012-09-10
CPC分类号： H03G3/3052 , H04B1/109
摘要： An incoming RF signal can be amplified in a RF front end of a RF receiver by conveying the signal through one of a multiple amplification paths. On each path, the gain can be controlled by RF automatic gain control (AGC) circuits. Each amplification path can be designed to handle incoming signals in a designated power range and to optimize receiver performance characteristics such as the noise figure (NF) and odd harmonic linearity in that power range. Signal power can be measured at different locations of the receiver and bypass switches can be used to convey the RF signals down one of the multiple paths based on the power measurements, according to executable logical code. An incoming signal power hysteresis can be applied to stabilize the system. Further, signal power averaging and switch delaying mechanisms can be employed to stabilize the system for rapidly fluctuating signals.
摘要翻译： 通过将信号传送通过多个放大路径中的一个，RF射频信号可以在RF接收器的RF前端中放大。 在每个路径上，增益可由RF自动增益控制（AGC）电路控制。 每个放大路径可被设计为处理指定功率范围内的输入信号，并优化接收机性能特征，例如该功率范围内的噪声系数（NF）和奇次谐波线性度。 可以在接收机的不同位置测量信号功率，根据可执行逻辑代码，旁路开关可用于基于功率测量将射频信号传送到多个路径之一。 可以应用输入信号功率滞后来稳定系统。 此外，可以采用信号功率平均和开关延迟机制来稳定系统以实现快速波动的信号。
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公开(公告)号：US20220294480A1
公开(公告)日：2022-09-15
申请号：US17647286
申请日：2022-01-06
申请人： SiTune Corporation
发明人： Marzieh VEYSEH , Vahid M. TOOSI , Saeid MEHRMANESH
摘要： A direct digital radio having a high-speed RF front end in communication with an antenna, and a radio subsystem that can be configured to form a programmable multi-standard transceiver system. The high-speed RF front including RF inputs configured to receive a plurality of radio frequencies (e.g., frequencies between 400 MHz to 7.2 GHz, millimeter wave frequency signals, etc.) and wideband low noise amplifiers provides amplified signals to RF data converters, analog interfaces, digital interfaces, component interfaces, etc. The programmable multi-standard transceiver is operable in frequencies compatible with multiple networks such as private LTE and 5G networks as well as other wireless IoT standards and WiFi in multi-standard network access equipment. The programmable multi-standard transceiver can greatly reduce complexity for the baseband processing, lower the cost of the overall transceiver system, reduce power consumption, and at the same time, benefit from improvements on the digital functions through integration.
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公开(公告)号：US10333636B2
公开(公告)日：2019-06-25
申请号：US15659973
申请日：2017-07-26
申请人： SiTune Corporation
IPC分类号： H03D3/00 , H04B1/403 , H04W24/08 , H04B17/309
摘要： The present disclosure relates to methods and systems for monitoring upstream signals and for providing the total bandwidth to a base station for analysis of any disruptions. In an example, the present methods and systems include at least a first circuit and a second circuit. The first circuit is coupled to a cable input-output port. The first circuit is configured for providing upstream signals from broadband signals of the upstream feed. The second circuit is configured for processing the upstream signals by adjusting its dynamic range to provide processed signals with an adjusted dynamic range. The second circuit is also configured for analyzing a spectrum of the processed signals and for providing information characterizing the processed signals to a processor of a modem.
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公开(公告)号：US09037105B2
公开(公告)日：2015-05-19
申请号：US14282575
申请日：2014-05-20
申请人： SITUNE CORPORATION
CPC分类号： H04B1/16 , H03F3/19 , H03F2200/135 , H03F2200/144 , H03F2200/451 , H03G3/3036 , H03G3/3068 , H03H11/1213 , H03H11/1291 , H03K5/00 , H04B1/10 , H04L25/08
摘要： A system and method is provided for filtering and amplifying a signal where amplification can be distributed between stages of a filter and gain can be assigned throughout the filter to optimize system performance. Such a system can be implemented in the baseband section of RF receivers. VGAs can be implemented between filter stages, such as biquads, or VGAs can be incorporated in filter stages. Substantially linear VGAs comprising a parallel resistor array can be incorporated in the circuitry of the filter stages to reduce distortion. Gain can be assigned dynamically in the amplification stages to improve noise and/or linearity performance. For example, gain assignments can be implemented so that high power undesired signal components are filtered out before amplification to prevent component saturation, and low power signals are amplified before they are filtered to improve noise performance.
摘要翻译： 提供了一种用于过滤和放大信号的系统和方法，其中可以在滤波器的级之间分布放大，并且可以在整个滤波器上分配增益以优化系统性能。 这样的系统可以在RF接收机的基带部分中实现。 VGA可以在滤波器级之间实现，例如二进制二进制，或者VGA可以并入滤波器级。 包括并联电阻器阵列的基本线性VGA可以并入滤波器级的电路中以减少失真。 增益可以在放大级别动态分配，以提高噪声和/或线性性能。 例如，可以实现增益分配，使得在放大之前将高功率不需要的信号分量滤除以防止元件饱和，并且低功率信号在滤波之前被放大以提高噪声性能。
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