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公开(公告)号:US11356194B2
公开(公告)日:2022-06-07
申请号:US16979978
申请日:2019-03-12
发明人: Taiji Kondo
IPC分类号: G08C17/00 , H04L1/00 , H04B17/336 , H04L27/26 , H04W52/24
摘要: A communication system that uses a wired transmission line and multi-carrier modulation includes a transmitting device and a receiving device that are connected through the wired transmission line, wherein the receiving device includes an estimator configured to estimate a first SINR (Signal-to-Interference-Plus-Noise Ratio) of a first sub-carrier and a second SINR of a second sub-carrier, the transmitting device includes a power adjustor configured to boost a transmission power for the first sub-carrier such that an SINR of the first sub-carrier reaches a first SINR threshold corresponding to a first MCS (Modulation and Coding Scheme) that is larger than the first SINR, and back off a transmission power for the second sub-carrier such that an SINR of the second sub-carrier is lowered to a second SINR threshold corresponding to a second MCS that is smaller than the second SINR, and the transmitting device allocates the first MCS to the first sub-carrier.
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公开(公告)号:US20220129729A1
公开(公告)日:2022-04-28
申请号:US17571542
申请日:2022-01-10
发明人: Mahito MATSUMOTO , Koji ISHIO , Hironobu FUJIYOSHI
摘要: Provided is a processor for a neural network whose high-performance compact model can be incorporated into low-spec devices such as embedded devices or mobile devices without requiring re-training. The processor for a neural network, which uses a multi-valued basis matrix, widens the range of integer values that can be taken by each element of the multi-valued basis matrix; thus, the number of dimensions (the number of elements) of a scaling coefficient vector is reduced accordingly. The elements of the scaling coefficient vector are real numbers, and thus reducing the amount of processing of real number calculation processing allows for reducing the number of dimensions (the number of elements) of the scaling coefficient vector. As a result, this neural network processor significantly reduces the amount of calculation processing while ensuring the calculation accuracy when performing matrix calculation processing using the binary basis matrix.
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公开(公告)号:US11115181B2
公开(公告)日:2021-09-07
申请号:US16799836
申请日:2020-02-25
发明人: Takahiko Sugahara , Hiromu Yutani
摘要: A control circuit causes a first cryptographic module to perform a dummy operation in a command processing period and a data processing period in which a second cryptographic module performs a normal operation while the first cryptographic module does not perform a normal operation.
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公开(公告)号:US11074370B2
公开(公告)日:2021-07-27
申请号:US16296249
申请日:2019-03-08
摘要: A host device includes a power supply unit configured to supply power to a SoC, a current measurement circuit configured to measure a current from the power supply unit to the SoC, a detection unit configured to detect a power supply glitch in the host device, on the basis of a result of current measurement by the current measurement circuit, and a controller configured to suspend transmission of encrypted command from the host device to the memory device if the detection unit detects a power supply glitch in the host device.
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公开(公告)号:US20210182672A1
公开(公告)日:2021-06-17
申请号:US17105651
申请日:2020-11-27
发明人: Hiromu HASEGAWA
摘要: A Self-Organizing Map learning device includes a distance calculator that obtains a distance D between an input vector in an observation space and a reference vector of each neuron in a latent space, a smallest value neuron specifier that specifies a smallest value neuron having the smallest distance D, a neuron selector that selects M (M is an integer smaller than L) selection neurons from the L (L is equal to or larger than 2) smallest value neurons in a case where the L smallest value neurons are present, and an updater that updates the reference vector of each neuron in the latent space with the M selection neurons as winner neurons.
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公开(公告)号:US11009535B2
公开(公告)日:2021-05-18
申请号:US16231679
申请日:2018-12-24
IPC分类号: G01R21/133 , G01R21/06 , G01R19/00 , G01R19/257 , G01R19/165 , G06F1/26 , G06F11/30 , G06F11/28
摘要: A circuitry is configured to calculate a measured average value based on measured current values obtained in a target period for determination, and determine whether a memory device is an authorized or an unauthorized product, based on a comparison result between a measured average value and a reference average value.
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公开(公告)号:US10586502B2
公开(公告)日:2020-03-10
申请号:US15943478
申请日:2018-04-02
发明人: Hidefumi Inoue
摘要: Provided is a display control device that can, even with a self-emitting display, minimize power consumption and dramatically increase the battery life time of information device. The display control device includes: a phase adjustment circuit that adjusts a phase difference between input image data including a vertical blanking period and memory image data read from a frame buffer, by adjusting the number of vertical blanking lines on the basis of a difference between the number of vertical lines related to the input image data and the number of vertical lines related to phase adjusted image data in which the number of vertical blanking lines related to the memory image data is adjusted, and generating the phase adjusted image data; a selector that outputs the phase adjusted image data to the display as output image data in the period lasting until image display under PSR terminates; and a vertical line number calculation circuit that outputs a vertical line number signal related to the number of vertical lines related to output image data to the display until when a head of a frame of the output image data is output.
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公开(公告)号:US10447253B2
公开(公告)日:2019-10-15
申请号:US15840163
申请日:2017-12-13
发明人: Abhishek Kumar Khare
摘要: A high performance phase-locked loop, the device includes a phase frequency detector, a charge pump, a loop filter, a first oscillator having inverters, configured to generate a first current, a second oscillator having a scaled version of the inverters of the first oscillator, a digital to analog converter, configured to generate a second current by multiplying the first current and a frequency code, a voltage to current converter, configured to generate a third current by converting voltage output of the loop filter to current, wherein input current to the second oscillator is sum of the second current and the third current.
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公开(公告)号:US10341147B1
公开(公告)日:2019-07-02
申请号:US15890285
申请日:2018-02-06
摘要: A high performance equalization method is disclosed for achieving low deterministic jitter across Process, Voltage and Temperature (PVT) for various channel lengths and data rates. The method includes receiving input signal at front end of a receiver upon passing through a channel, generating with an eye-opening monitor circuit a control code based on channel conditions, and equalizing with a continuous-time linear equalization equalizer (CTLE) circuit the input signal based on the control code such that the eye-opening monitor circuit and the CTLE circuit are biased based on their corresponding replica circuits, and the control code is generated in a feedforward configuration.
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公开(公告)号:US20190122371A1
公开(公告)日:2019-04-25
申请号:US16224858
申请日:2018-12-19
发明人: Kenta NAGAMINE , Norikazu IKOMA , Fumiya SHINGU , Hiromu HASEGAWA
摘要: The position of a moving object is estimated with high accuracy based on landmark information, and highly accurate state estimation is performed appropriately at high speed. A landmark detection unit obtains a distance between the moving object and each of two or more landmarks as landmark distance information based on observation data obtained by an observation obtaining unit. A candidate area obtaining unit determines a candidate area for a position of the moving object based on the landmark distance information obtained by the landmark detection unit, and obtains candidate area information indicating the determined candidate area. A state estimation unit estimates an internal state of the moving object based on the observation data, the landmark distance information, and the candidate area information to obtain moving object internal state estimation data, and estimates the environmental map based on the candidate area information and the landmark distance information to obtain environmental map data.
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