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1.发明公开公开(公告)号：US20240062837A1
公开(公告)日：2024-02-22
申请号：US18385642
申请日：2023-10-31
发明人： Yali Song , Jianquan Ji , Kaikai You , An Zhang , XiangNan Zhao , Ying Cui , Shan Li , Kaiwei Li , Lei Jin , Xueqing Huang , Meng Lou , Jinlong Zhang
CPC分类号： G11C16/3427 , G11C16/0483 , H10B41/27
摘要： A method for operating a memory device is disclosed. The memory device includes a first word line, a second word line, a first dummy word line, and a second dummy word line. The first dummy word line and the second dummy word line are between the first word line and the second word line. A first pass voltage is applied to the first dummy word line in a program operation. A second pass voltage is applied to the second dummy word line in the program operation. The first pass voltage is different from the second pass voltage.
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2.发明授权公开(公告)号：US11848058B2
公开(公告)日：2023-12-19
申请号：US18118565
申请日：2023-03-07
发明人： Yali Song , Jianquan Jia , Kaikai You , An Zhang , Xiangnan Zhao , Ying Cui , Shan Li , Kaiwei Li , Lei Jin , Xueqing Huang , Meng Lou , Jinlong Zhang
CPC分类号： G11C16/3427 , G11C16/0483 , H10B41/27 , H10B43/27
摘要： A method for operating a memory is disclosed. The memory includes a first group of word lines, a second group of word lines, a first dummy word line, and a second dummy word line. The first dummy word line and the second dummy word line are between the first group of word lines and the second group of word lines. A first pass voltage is applied to the first dummy word line and applying a second pass voltage to the second dummy word line. A program voltage is applied to a selected word line, wherein a condition is met: a first voltage difference between the first pass voltage and a first threshold voltage of a first dummy cell corresponding to the first dummy word line is different from a second voltage difference between the second pass voltage and a second threshold voltage of a second dummy cell corresponding to the second dummy word line.
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3.发明公开公开(公告)号：US20230207027A1
公开(公告)日：2023-06-29
申请号：US18118565
申请日：2023-03-07
发明人： Yali Song , Jianquan Jia , Kaikai You , An Zhang , XiangNan Zhao , Ying Cui , Shan Li , Kaiwei Li , Lei Jin , Xueqing Huang , Meng Lou , Jinlong Zhang
CPC分类号： G11C16/3427 , G11C16/0483 , H10B41/27
摘要： A method for operating a memory is disclosed. The memory includes a first group of word lines, a second group of word lines, a first dummy word line, and a second dummy word line. The first dummy word line and the second dummy word line are between the first group of word lines and the second group of word lines. A first pass voltage is applied to the first dummy word line and applying a second pass voltage to the second dummy word line. A program voltage is applied to a selected word line, wherein a condition is met: a first voltage difference between the first pass voltage and a first threshold voltage of a first dummy cell corresponding to the first dummy word line is different from a second voltage difference between the second pass voltage and a second threshold voltage of a second dummy cell corresponding to the second dummy word line.
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公开(公告)号：US20240170070A1
公开(公告)日：2024-05-23
申请号：US18089420
申请日：2022-12-27
发明人： Lu Qiu , Xueqing Huang , Junyao Zhu , Yao Chen
CPC分类号： G11C16/102 , G11C16/08 , G11C16/16
摘要： A memory includes at least a target word line and a first word line group and a second word line group respectively stacked on both sides of the target word line. The first word line group includes first word lines, and the second word line group includes second word lines. A method for operating the memory includes, during a pre-charge operation, applying a first bias voltage signal to the plurality of first word lines, applying a second bias voltage signal to a target word line, and applying a third bias voltage signal to the plurality of second word lines. The method also includes, during a programming operation, applying a program voltage signal to a target word line.
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公开(公告)号：US20230343401A1
公开(公告)日：2023-10-26
申请号：US17954913
申请日：2022-09-28
发明人： Xueqing Huang , Tianyu Wang
CPC分类号： G11C16/3459 , G11C16/102 , G11C16/3495
摘要： A nonvolatile memory device, a memory system, and a programming method are provided. The nonvolatile memory device includes a plurality of pages, and each of the pages includes a plurality of single-level cells. The programming method includes performing a programming operation on a first page of the plurality of pages using a signal including a first programming pulse, a programming verifying pulse, and a second programming pulse, where the first programming pulse is a start programming pulse and the second signal value of the second programming pulse is greater than a first signal value of the first programming pulse; and programming a second page of the plurality of pages using only a third programming pulse, where a third signal value of the third programming pulse is determined based at least on the first signal value and the failed bit count.
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6.发明授权公开(公告)号：US11626170B2
公开(公告)日：2023-04-11
申请号：US17187651
申请日：2021-02-26
发明人： Yali Song , Jianquan Jia , Kaikai You , An Zhang , XiangNan Zhao , Ying Cui , Shan Li , Kaiwei Li , Lei Jin , Xueqing Huang , Meng Lou , Jinlong Zhang
IPC分类号： G11C16/04 , G11C16/34 , H01L27/11556 , H01L27/11582
摘要： A memory includes an upper deck and a lower deck. The upper deck includes a first upper dummy word line. The lower deck includes a first lower dummy word line. A method for reducing program disturbance of the memory includes adjusting a first upper bias voltage applied to the first upper dummy word line and/or a first upper threshold voltage of the first upper dummy word line to adjust a first difference between the first upper bias voltage and the first upper threshold voltage; and adjusting a first lower bias voltage applied to the first lower dummy word line and/or a first lower threshold voltage of the first lower dummy word line to adjust a second difference between the first lower bias voltage and the first lower threshold voltage.
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公开(公告)号：US20230024971A1
公开(公告)日：2023-01-26
申请号：US17881231
申请日：2022-08-04
发明人： Xueqing Huang , Wei Huang , Xing Zhou , Chan Wang , Kang Li , Cong Luo , Fengxiang Gao
摘要： A memory device includes a memory cell array including memory blocks and a peripheral circuit coupled to the memory cell array. Each memory block includes memory strings each including dummy cells and select transistors, bit lines coupled to the memory strings, select lines including first select lines and second select lines, and one or more dummy word lines. Each select line coupled to the select transistors. The first select lines are closer to the bit lines than the second select lines. Each dummy word line is coupled to the respective dummy cells. The dummy word lines include a first dummy word line adjacent to either the first select lines or the second select lines. The peripheral circuit is configured to apply a turn-on voltage to all the first select lines, and apply a program voltage to the first dummy word line.
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8.发明申请公开(公告)号：US20210193237A1
公开(公告)日：2021-06-24
申请号：US17187651
申请日：2021-02-26
发明人： Yali Song , Jianquan Jia , Kaikai You , An Zhang , XiangNan Zhao , Ying Cui , Shan Li , Kaiwei Li , Lei Jin , Xueqing Huang , Meng Lou , Jinlong Zhang
摘要： A memory includes an upper deck and a lower deck. The upper deck includes a first upper dummy word line. The lower deck includes a first lower dummy word line. A method for reducing program disturbance of the memory includes adjusting a first upper bias voltage applied to the first upper dummy word line and/or a first upper threshold voltage of the first upper dummy word line to adjust a first difference between the first upper bias voltage and the first upper threshold voltage; and adjusting a first lower bias voltage applied to the first lower dummy word line and/or a first lower threshold voltage of the first lower dummy word line to adjust a second difference between the first lower bias voltage and the first lower threshold voltage.
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9.发明授权公开(公告)号：US10991438B1
公开(公告)日：2021-04-27
申请号：US16799806
申请日：2020-02-24
发明人： Yali Song , Jianquan Jia , Kaikai You , An Zhang , XiangNan Zhao , Ying Cui , Shan Li , Kaiwei Li , Lei Jin , Xueqing Huang , Meng Lou , Jinlong Zhang
IPC分类号： G11C16/04 , G11C16/34 , H01L27/11582 , H01L27/11556
摘要： A memory includes an upper deck and a lower deck. The upper deck includes a first upper dummy word line. The lower deck includes a first lower dummy word line. A method for reducing program disturbance of the memory includes adjusting a first upper bias voltage applied to the first upper dummy word line and/or a first upper threshold voltage of the first upper dummy word line to adjust a first difference between the first upper bias voltage and the first upper threshold voltage; and adjusting a first lower bias voltage applied to the first lower dummy word line and/or a first lower threshold voltage of the first lower dummy word line to adjust a second difference between the first lower bias voltage and the first lower threshold voltage.
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