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公开(公告)号:US20230005959A1
公开(公告)日:2023-01-05
申请号:US17943172
申请日:2022-09-12
发明人: Jianzhong Wu , Zongke Xu , Jingjing Geng
IPC分类号: H01L27/11582 , H01L27/11565 , H01L27/1157
摘要: A method for forming a three-dimensional (3D) memory device includes forming a dielectric stack including a plurality of first/second dielectric layer pairs over a substrate, forming a plurality of channel structures extending in a lateral direction in a core region of the dielectric stack, forming a staircase structure including a plurality of stairs extending along the lateral direction in a staircase region of the dielectric stack, forming a first drain-select-gate (DSG) cut opening extending in the lateral direction in the core region and a second DSG cut opening in the staircase region, and forming a first DSG cut structure in the first DSG cut opening and a second DSG cut structure in the second DSG cut opening.
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2.
公开(公告)号:US20220077180A1
公开(公告)日:2022-03-10
申请号:US17084315
申请日:2020-10-29
发明人: Jianzhong Wu , Jingjing Geng
IPC分类号: H01L27/11582
摘要: Three-dimensional (3D) memory devices and methods for forming the 3D memory devices are provided. In one example, a 3D memory device includes a substrate and a memory stack including interleaved conductive layers and dielectric layers on the substrate. The memory stack includes a core structure and a staircase structure. The staircase structure is on one side of the memory stack. The 3D memory device also includes a dummy channel structure extending vertically through the staircase structure. The dummy channel structure includes a plurality of sections along a vertical side of the dummy channel structure. The plurality of sections respectively interface with the interleaved conductive layers in the staircase structure. At least one of the plurality of sections includes a non-flat surface at an interface between the at least one of the plurality of sections and a corresponding conductive layer.
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公开(公告)号:US20230171961A1
公开(公告)日:2023-06-01
申请号:US18096316
申请日:2023-01-12
发明人: Jianzhong Wu , Kun Zhang , Tingting Zhao , Rui Su , Zhongwang Sun , Wenxi Zhou , Zhiliang Xia
IPC分类号: H10B43/27 , H01L21/768 , H01L23/535 , H10B41/27 , H10B41/35 , H10B43/35
CPC分类号: H10B43/27 , H01L21/76805 , H01L21/76831 , H01L21/7684 , H01L21/76895 , H01L23/535 , H10B41/27 , H10B41/35 , H10B43/35 , H01L2221/1063
摘要: Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a 3D memory device includes: a memory stack comprising interleaved conductive layers and dielectric layers; a plurality of channel structures extending vertically through the memory stack; a plurality of channel local contacts each located above and in contact with a corresponding one of the plurality of channel structures, and having a metal material; and a slit structure extending vertically through the memory stack and laterally along a first direction to separate the plurality of channel structures. The slit structure comprises a contact. The contact comprises a first contact portion having a semiconductor material and a second contact portion above the first contact portion and having the metal material. An upper end of the second contact portion and upper ends of the plurality of channel local contacts are coplanar.
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公开(公告)号:US11600633B2
公开(公告)日:2023-03-07
申请号:US16862368
申请日:2020-04-29
发明人: Jianzhong Wu , Kun Zhang , Tingting Zhao , Rui Su , Zhongwang Sun , Wenxi Zhou , Zhiliang Xia
IPC分类号: H01L27/115 , H01L27/11582 , H01L21/768 , H01L23/535 , H01L27/11524 , H01L27/11556 , H01L27/1157
摘要: Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a memory stack, a channel structure, a channel local contact, and a slit structure. The memory stack includes interleaved conductive layers and dielectric layers above the substrate. The channel structure extends vertically through the memory stack. The channel local contact is above and in contact with the channel structure. The slit structure extends vertically through the memory stack. The slit structure includes a contact including a first contact portion and a second contact portion above the first contact portion and having a different material of the first contact portion. An upper end of the second contact portion of the slit structure is flush with an upper end of the channel local contact.
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公开(公告)号:US20210272982A1
公开(公告)日:2021-09-02
申请号:US17321258
申请日:2021-05-14
发明人: Jianzhong Wu , Kun Zhang , Tingting Zhao , Rui Su , Zhongwang Sun , Wenxi Zhou , Zhiliang Xia
IPC分类号: H01L27/11582 , H01L27/1157 , H01L27/11524 , H01L21/768 , H01L27/11556 , H01L23/535
摘要: A method for forming a 3D memory device is disclosed. A channel structure extending vertically through a dielectric stack including interleaved sacrificial layers and dielectric layers above a substrate is formed. A sacrificial plug above and in contact with the channel structure is formed. A slit opening extending vertically through the dielectric stack is formed. A memory stack including interleaved conductive layers and the dielectric layers is formed by replacing, through the slit opening, the sacrificial layers with the conductive layers. A first contact portion is formed in the slit opening. The sacrificial plug is removed after forming the first contact portion to expose the channel structure. A channel local contact above and in contact with the channel structure, and a second contact portion above the first contact portion in the slit opening are simultaneously formed.
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公开(公告)号:US12082414B2
公开(公告)日:2024-09-03
申请号:US17344949
申请日:2021-06-11
发明人: Jianzhong Wu , Zongke Xu , Jingjing Geng
摘要: Embodiments of structures and methods for forming three-dimensional (3D) memory devices are provided. In an example, a 3D memory device includes a core region and a staircase region. The staircase region includes a plurality of stairs each has at least a conductor/dielectric pair extending in a lateral direction. The staircase region includes a drain-select-gate (DSG) cut structure extending along the lateral direction and a vertical direction, and a plurality of support structures extending in the DSG structure along the vertical direction. Of at least one of the support structures, a dimension along the lateral direction is greater than a dimension along a second lateral direction perpendicular to the lateral direction.
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公开(公告)号:US12022656B2
公开(公告)日:2024-06-25
申请号:US17321258
申请日:2021-05-14
发明人: Jianzhong Wu , Kun Zhang , Tingting Zhao , Rui Su , Zhongwang Sun , Wenxi Zhou , Zhiliang Xia
IPC分类号: H10B43/27 , H01L21/768 , H01L23/535 , H10B41/27 , H10B41/35 , H10B43/35
CPC分类号: H10B43/27 , H01L21/76805 , H01L21/76831 , H01L21/7684 , H01L21/76895 , H01L23/535 , H10B41/27 , H10B41/35 , H10B43/35 , H01L2221/1063
摘要: A method for forming a 3D memory device is disclosed. A channel structure extending vertically through a dielectric stack including interleaved sacrificial layers and dielectric layers above a substrate is formed. A sacrificial plug above and in contact with the channel structure is formed. A slit opening extending vertically through the dielectric stack is formed. A memory stack including interleaved conductive layers and the dielectric layers is formed by replacing, through the slit opening, the sacrificial layers with the conductive layers. A first contact portion is formed in the slit opening. The sacrificial plug is removed after forming the first contact portion to expose the channel structure. A channel local contact above and in contact with the channel structure, and a second contact portion above the first contact portion in the slit opening are simultaneously formed.
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8.
公开(公告)号:US11985824B2
公开(公告)日:2024-05-14
申请号:US17084315
申请日:2020-10-29
发明人: Jianzhong Wu , Jingjing Geng
IPC分类号: H01L27/11582 , H10B43/27 , H01L21/02
CPC分类号: H10B43/27 , H01L21/0223 , H01L21/02255
摘要: Three-dimensional (3D) memory devices and methods for forming the 3D memory devices are provided. In one example, a 3D memory device includes a substrate and a memory stack including interleaved conductive layers and dielectric layers on the substrate. The memory stack includes a core structure and a staircase structure. The staircase structure is on one side of the memory stack. The 3D memory device also includes a dummy channel structure extending vertically through the staircase structure. The dummy channel structure includes a plurality of sections along a vertical side of the dummy channel structure. The plurality of sections respectively interface with the interleaved conductive layers in the staircase structure. At least one of the plurality of sections includes a non-flat surface at an interface between the at least one of the plurality of sections and a corresponding conductive layer.
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公开(公告)号:US20210335806A1
公开(公告)日:2021-10-28
申请号:US16881173
申请日:2020-05-22
发明人: Jianzhong Wu , Zongke Xu , Jingjing Geng
IPC分类号: H01L27/11582 , H01L27/11565 , H01L27/1157
摘要: Embodiments of structures and methods for forming three-dimensional (3D) memory devices are provided. In an example, a 3D memory device includes a core region and a staircase region. The staircase region includes a plurality of stairs each has at least a conductor/dielectric pair extending in a lateral direction. The staircase region includes a drain-select-gate (DSG) cut structure extending along the lateral direction and a vertical direction, and a plurality of support structures extending in the DSG structure along the vertical direction. Of at least one of the support structures, a dimension along the lateral direction is greater than a dimension along a second lateral direction perpendicular to the lateral direction.
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10.
公开(公告)号:US11502098B2
公开(公告)日:2022-11-15
申请号:US16881173
申请日:2020-05-22
发明人: Jianzhong Wu , Zongke Xu , Jingjing Geng
IPC分类号: H01L27/11582 , H01L27/1157 , H01L27/11565
摘要: Embodiments of structures and methods for forming three-dimensional (3D) memory devices are provided. In an example, a 3D memory device includes a core region and a staircase region. The staircase region includes a plurality of stairs each has at least a conductor/dielectric pair extending in a lateral direction. The staircase region includes a drain-select-gate (DSG) cut structure extending along the lateral direction and a vertical direction, and a plurality of support structures extending in the DSG structure along the vertical direction. Of at least one of the support structures, a dimension along the lateral direction is greater than a dimension along a second lateral direction perpendicular to the lateral direction.
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