Multi-path digital pre-distortion
    1.
    发明授权
    Multi-path digital pre-distortion 有权
    多路数字预失真

    公开(公告)号:US09172409B2

    公开(公告)日:2015-10-27

    申请号:US14088252

    申请日:2013-11-22

    Applicant: Xilinx, Inc.

    Abstract: An apparatus relates generally to multi-path digital predistortion. In this apparatus, a single-band digital predistorter engine has first and second sample paths. An input stage is coupled to receive input samples and configured to separate them into first samples and second samples. The input stage provides first and second magnitudes for the first and second samples, respectively. A first set of digital predistorters receives the first samples, the first magnitudes and the second magnitudes. A second set of digital predistorters receives the second samples, the second magnitudes and the first magnitudes. An output stage is coupled to receive predistorted outputs from the first set of digital predistorters and the second set of digital predistorters and is configured to provide a digital predistorted composite signal from the first set of digital predistorters and the second set of digital predistorters.

    Abstract translation: 一种装置一般涉及多径数字预失真。 在该装置中,单频数字预失真器引擎具有第一和第二采样路径。 输入级被耦合以接收输入样本并被配置为将它们分离成第一样本和第二样本。 输入级分别为第一和第二采样提供第一和第二幅度。 第一组数字预失真器接收第一个样本,第一个量值和第二个量值。 第二组数字预失真器接收第二个样本,第二个量值和第一个量值。 输出级被耦合以从第一组数字预失真器和第二组数字预失真器接收预失真输出,并且被配置为从第一组数字预失真器和第二组数字预失真器提供数字预失真复合信号。

    Pulse cancellation crest factor reduction with a low sampling rate
    2.
    发明授权
    Pulse cancellation crest factor reduction with a low sampling rate 有权
    脉冲消除波峰因数降低采样率低

    公开(公告)号:US09313078B1

    公开(公告)日:2016-04-12

    申请号:US14682737

    申请日:2015-04-09

    Applicant: Xilinx, Inc.

    CPC classification number: H04L27/2624

    Abstract: A method relates generally to data transmission. In such a method, a peak detector detects a signal peak of an input signal exceeding a threshold amplitude. This detecting includes sampling the input signal at a sampling frequency to provide a sampled signal. The sampling frequency is in a range greater than a bandwidth frequency of a carrier signal used for providing the input signal and less than twice the bandwidth frequency. Samples of the sampled signal proximate to the signal peak are interpolated to provide a reconstructed peak. A cancellation pulse is applied by a cancellation pulse generator to the samples to reduce the signal peak. A version of the input signal is output after application of the cancellation pulse.

    Abstract translation: 一种方法一般涉及数据传输。 在这种方法中,峰值检测器检测超过阈值振幅的输入信号的信号峰值。 该检测包括以采样频率采样输入信号以提供采样信号。 采样频率在大于用于提供输入信号的载波信号的带宽频率的范围内,并且小于带宽频率的两倍。 插值到信号峰值附近的采样信号的样本被内插以提供重建的峰值。 取消脉冲由消除脉冲发生器施加到样本以减小信号峰值。 在应用取消脉冲之后输出输入信号的一个版本。

    Cancellation pulse crest factor reduction
    3.
    发明授权
    Cancellation pulse crest factor reduction 有权
    取消脉冲波峰因数降低

    公开(公告)号:US09014319B1

    公开(公告)日:2015-04-21

    申请号:US14088221

    申请日:2013-11-22

    Applicant: Xilinx, Inc.

    CPC classification number: H04L1/0033 H04L27/2624

    Abstract: An apparatus relates generally to crest factor reduction. In this apparatus, a finite impulse response filter provides a first cancellation pulse and a second cancellation pulse. A first adder is coupled to receive an input signal and the first cancellation pulse to provide a first difference signal. A peak engine is coupled to receive the first difference signal to provide a cancellation pulse value responsive to the first difference signal. The finite impulse response filter is coupled to receive the cancellation pulse value to provide each of the first cancellation pulse and the second cancellation pulse. A delay is coupled to receive the input signal to provide a delayed input signal. A second adder is coupled to receive the delayed input signal and the second cancellation pulse to provide a second difference signal. The second difference signal is a crest factor reduced version of the delayed input signal.

    Abstract translation: 装置一般涉及波峰因数降低。 在该装置中,有限脉冲响应滤波器提供第一抵消脉冲和第二消除脉冲。 第一加法器被耦合以接收输入信号和第一抵消脉冲以提供第一差分信号。 峰值引擎被耦合以接收第一差分信号以响应于第一差分信号提供消除脉冲值。 有限脉冲响应滤波器被耦合以接收消除脉冲值以提供第一消除脉冲和第二消除脉冲中的每一个。 耦合延迟以接收输入信号以提供延迟的输入信号。 第二加法器被耦合以接收延迟的输入信号和第二抵消脉冲以提供第二差分信号。 第二差分信号是延迟输入信号的波峰因数减小版本。

    Crest factor reduction
    4.
    发明授权
    Crest factor reduction 有权
    波峰因数降低

    公开(公告)号:US09054928B1

    公开(公告)日:2015-06-09

    申请号:US14444612

    申请日:2014-07-28

    Applicant: Xilinx, Inc.

    CPC classification number: H04L27/2614 H04B1/0475 H04B2201/70706 H04L27/2623

    Abstract: A system for crest factor reduction (CFR) includes a peak detector configured to receive an input signal (xk); a running maximum filter configured to generate a scaling factor based on a window gain (Gk) and a filter length, wherein the window gain (Gk) is based on the input signal (xk) and a threshold value (T); a window CFR gain filter configured to generate a gain correction (Fk) based on the scaling factor and the filter length; a delay configured to delay the input signal (xk) to generate a delayed input signal; a multiplier configured to multiply the gain correction (Fk) by the delayed input signal to obtain a peak correction value; and an adder configured to determine an output signal (yk) based on the peak correction value and the delayed input signal.

    Abstract translation: 用于波峰因数降低的系统(CFR)包括被配置为接收输入信号(xk)的峰值检测器; 运行最大过滤器,其被配置为基于窗口增益(Gk)和滤波器长度来生成缩放因子,其中所述窗口增益(Gk)基于所述输入信号(xk)和阈值(T); 窗口CFR增益滤波器,被配置为基于缩放因子和滤波器长度来生成增益校正(Fk); 延迟配置成延迟输入信号(xk)以产生延迟的输入信号; 配置为将所述增益校正(Fk)乘以所述延迟输入信号以获得峰值校正值的乘法器; 以及加法器,被配置为基于峰值校正值和延迟的输入信号来确定输出信号(yk)。

    MULTI-PATH DIGITAL PRE-DISTORTION
    5.
    发明申请
    MULTI-PATH DIGITAL PRE-DISTORTION 有权
    多路数字预失真

    公开(公告)号:US20150146822A1

    公开(公告)日:2015-05-28

    申请号:US14088252

    申请日:2013-11-22

    Applicant: Xilinx, Inc.

    Abstract: An apparatus relates generally to multi-path digital predistortion. In this apparatus, a single-band digital predistorter engine has first and second sample paths. An input stage is coupled to receive input samples and configured to separate them into first samples and second samples. The input stage provides first and second magnitudes for the first and second samples, respectively. A first set of digital predistorters receives the first samples, the first magnitudes and the second magnitudes. A second set of digital predistorters receives the second samples, the second magnitudes and the first magnitudes. An output stage is coupled to receive predistorted outputs from the first set of digital predistorters and the second set of digital predistorters and is configured to provide a digital predistorted composite signal from the first set of digital predistorters and the second set of digital predistorters.

    Abstract translation: 一种装置一般涉及多径数字预失真。 在该装置中,单频数字预失真器引擎具有第一和第二采样路径。 输入级被耦合以接收输入样本并被配置为将它们分离成第一样本和第二样本。 输入级分别为第一和第二采样提供第一和第二幅度。 第一组数字预失真器接收第一个样本,第一个量值和第二个量值。 第二组数字预失真器接收第二个样本,第二个量值和第一个量值。 输出级被耦合以从第一组数字预失真器和第二组数字预失真器接收预失真输出,并且被配置为从第一组数字预失真器和第二组数字预失真器提供数字预失真复合信号。

    Peak detection in signal processing
    6.
    发明授权
    Peak detection in signal processing 有权
    信号处理中的峰值检测

    公开(公告)号:US09160594B1

    公开(公告)日:2015-10-13

    申请号:US14444577

    申请日:2014-07-28

    Applicant: Xilinx, Inc.

    CPC classification number: H04B1/0475 H04L27/2624

    Abstract: An apparatus for peak detection includes a peak identification unit configured to determine an identifier of a peak location; a first differential filter configured to provide coefficients for a first polynomial; a fractional locater configured to determine a fractional location of a peak based on the coefficients for the first polynomial and the identifier of the peak location; and a first fractional interpolator to determine a first peak amplitude based on the fractional location of the peak and the coefficients for the first polynomial.

    Abstract translation: 用于峰值检测的装置包括:峰值识别单元,被配置为确定峰值位置的标识符; 第一差分滤波器,被配置为提供第一多项式的系数; 分数定位器,被配置为基于第一多项式的系数和峰值位置的标识符来确定峰值的分数位置; 以及第一分数插值器,用于基于所述峰值的分数位置和所述第一多项式的系数来确定第一峰值幅度。

    Multiband envelope tracking power amplifier
    7.
    发明授权
    Multiband envelope tracking power amplifier 有权
    多频带包络跟踪功率放大器

    公开(公告)号:US08913692B1

    公开(公告)日:2014-12-16

    申请号:US14088234

    申请日:2013-11-22

    Applicant: Xilinx, Inc.

    CPC classification number: H04B1/0475 H03F1/3223 H03F3/24 H04B2001/0441

    Abstract: An apparatus relates generally to multiband power modulation. In such an apparatus, there is a first power supply and a second power supply. The first power supply and the second power supply are each narrow-banded. A digital predistorter is coupled to provide separate bands of a modulation signal for respective input of a first band of the bands to the first power supply and a second band of the bands to the second power supply. The first power supply generates a first power at a first center frequency. The second power supply generates a second power at least at a second center frequency spaced apart from the first center frequency for a wide-band configuration. The second power output from the second power supply is coupled to the first power output from the first power supply to provide a multiband power modulation output.

    Abstract translation: 一种装置一般涉及多频带功率调制。 在这种装置中,存在第一电源和第二电源。 第一个电源和第二个电源都是窄带的。 数字预失真器被耦合以提供调制信号的单独频带,用于将带的第一频带的相应输入与第一电源以及频带的第二频带分配给第二电源。 第一电源以第一中心频率产生第一功率。 第二电源至少在与第一中心频率间隔开的第二中心频率处产生第二功率用于宽带配置。 来自第二电源的第二功率输出被耦合到来自第一电源的第一功率输出以提供多频带功率调制输出。

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