公开(公告)号：US07646216B2

公开(公告)日：2010-01-12

申请号：US11563632

申请日：2006-11-27

Applicant: Wilma Waiman Shiao ,  Stephen U. Yao ,  Ket-Chong Yap

Inventor： Wilma Waiman Shiao ,  Stephen U. Yao ,  Ket-Chong Yap

IPC: G06F7/38 ,  H03K19/173 ,  H03K19/177 ,  H01L25/00

CPC classification number: H03K19/0008 ,  H03K19/17736 ,  H03K19/17784

Abstract: An apparatus and method of reducing power consumption across a switch, such as an unprogrammed antifuse, is provided. The invention applies to antifuses, other switches such as transistor based switches, (e.g., FLASH, EEPROM and/or SRAM) and other devices exhibiting a leakage current, especially during a sleep or stand-by mode. During a sleep mode, such switches or other devices may be uncoupled from signals driving the switches, then terminals of each switch may be coupled to a common potential or allowed to float to a common potential thereby eliminating or reducing leakage currents through the switches.

Abstract translation: 提供了一种降低开关上的功耗的装置和方法，例如未编程的反熔丝。 本发明适用于反熔丝，诸如基于晶体管的开关的其它开关（例如，FLASH，EEPROM和/或SRAM）以及其它显示泄漏电流的器件，特别是在睡眠或待机模式期间。 在睡眠模式期间，这样的开关或其他装置可以与驱动开关的信号分离，然后每个开关的端子可以耦合到公共电位或允许浮动到公共电位，从而消除或减少通过开关的漏电流。

公开(公告)号：US20080122483A1

公开(公告)日：2008-05-29

申请号：US11563632

申请日：2006-11-27

Applicant: Wilma Waiman Shiao ,  Stephen U. Yao ,  Ket-Chong Yap

Inventor： Wilma Waiman Shiao ,  Stephen U. Yao ,  Ket-Chong Yap

IPC: H03K19/173

CPC classification number: H03K19/0008 ,  H03K19/17736 ,  H03K19/17784

Abstract: An apparatus and method of reducing power consumption across a switch, such as an unprogrammed antifuse, is provided. The invention applies to antifuses, other switches such as transistor based switches, (e.g., FLASH, EEPROM and/or SRAM) and other devices exhibiting a leakage current, especially during a sleep or stand-by mode. During a sleep mode, such switches or other devices may be uncoupled from signals driving the switches, then terminals of each switch may be coupled to a common potential or allowed to float to a common potential thereby eliminating or reducing leakage currents through the switches.

Abstract translation: 提供了一种降低开关上的功耗的装置和方法，例如未编程的反熔丝。 本发明适用于反熔丝，诸如基于晶体管的开关的其它开关（例如，FLASH，EEPROM和/或SRAM）以及其它显示泄漏电流的器件，特别是在睡眠或待机模式期间。 在睡眠模式期间，这样的开关或其他装置可以与驱动开关的信号分离，然后每个开关的端子可以耦合到公共电位或允许浮动到公共电位，从而消除或减少通过开关的漏电流。

公开(公告)号：US08018248B2

公开(公告)日：2011-09-13

申请号：US11525275

申请日：2006-09-21

Applicant: Ket-Chong Yap ,  Senani Gunaratna ,  Wilma Waiman Shiao

Inventor： Ket-Chong Yap ,  Senani Gunaratna ,  Wilma Waiman Shiao

IPC: H03K19/173

CPC classification number: H03K19/17744 ,  H03K19/17732 ,  H03K19/17796

Abstract: An integrated circuit includes a programmable logic device, a dedicated device, and an interface circuit between the two. The interface circuit can be easily modified to accommodate the different interface I/O demands of various dedicated devices that may be embedded into the integrated circuit. In one embodiment, the interface circuit may be implemented using a plurality of mask programmable uni-directional interface buffer circuits. The direction of any desired number of the interface buffer circuits can be reversed based on the needs of a desired dedicated device by re-routing the conductors in the interface buffer circuits in a single metal layer of the integrated circuit. In another embodiment, the interface circuit may be implemented using a hardware configurable bi-directional interface buffer circuit.

Abstract translation: 集成电路包括可编程逻辑器件，专用器件和两者之间的接口电路。 可以容易地修改接口电路以适应可嵌入到集成电路中的各种专用设备的不同接口I / O需求。 在一个实施例中，接口电路可以使用多个掩码可编程单向接口缓冲电路来实现。 可以通过在集成电路的单个金属层中的接口缓冲电路中重新布线导体，基于期望的专用器件的需要来反转任何所需数量的接口缓冲电路的方向。 在另一个实施例中，接口电路可以使用硬件可配置的双向接口缓冲电路来实现。

公开(公告)号：US20080074141A1

公开(公告)日：2008-03-27

申请号：US11525275

申请日：2006-09-21

Applicant: Ket-Chong Yap ,  Senani Gunaratna ,  Wilma Waiman Shiao

Inventor： Ket-Chong Yap ,  Senani Gunaratna ,  Wilma Waiman Shiao

IPC: H03K19/177

CPC classification number: H03K19/17744 ,  H03K19/17732 ,  H03K19/17796

Abstract: An integrated circuit includes a programmable logic device, a dedicated device, and an interface circuit between the two. The interface circuit can be easily modified to accommodate the different interface I/O demands of various dedicated devices that may be embedded into the integrated circuit. In one embodiment, the interface circuit may be implemented using a plurality of mask programmable uni-directional interface buffer circuits. The direction of any desired number of the interface buffer circuits can be reversed based on the needs of a desired dedicated device by re-routing the conductors in the interface buffer circuits in a single metal layer of the integrated circuit. In another embodiment, the interface circuit may be implemented using a hardware configurable bi-directional interface buffer circuit.

Abstract translation: 集成电路包括可编程逻辑器件，专用器件和两者之间的接口电路。 可以容易地修改接口电路以适应可嵌入到集成电路中的各种专用设备的不同接口I / O需求。 在一个实施例中，接口电路可以使用多个掩码可编程单向接口缓冲电路来实现。 可以通过在集成电路的单个金属层中的接口缓冲电路中重新布线导体，基于期望的专用器件的需要来反转任何所需数量的接口缓冲电路的方向。 在另一个实施例中，接口电路可以使用硬件可配置的双向接口缓冲电路来实现。

公开(公告)号：US08487652B2

公开(公告)日：2013-07-16

申请号：US13212522

申请日：2011-08-18

Applicant: Ket-Chong Yap ,  Senani Gunaratna ,  Wilma Waiman Shiao

Inventor： Ket-Chong Yap ,  Senani Gunaratna ,  Wilma Waiman Shiao

IPC: H03K19/173

CPC classification number: H03K19/17744 ,  H03K19/17732 ,  H03K19/17796

Abstract: An integrated circuit includes a programmable logic device, a dedicated device, and an interface circuit between the two. The interface circuit can be easily modified to accommodate the different interface I/O demands of various dedicated devices that may be embedded into the integrated circuit. In one embodiment, the interface circuit may be implemented using a plurality of mask programmable uni-directional interface buffer circuits. The direction of any desired number of the interface buffer circuits can be reversed based on the needs of a desired dedicated device by re-routing the conductors in the interface buffer circuits in a single metal layer of the integrated circuit. In another embodiment, the interface circuit may be implemented using a hardware configurable bi-directional interface buffer circuit.

Abstract translation: 集成电路包括可编程逻辑器件，专用器件和两者之间的接口电路。 可以容易地修改接口电路以适应可嵌入到集成电路中的各种专用设备的不同接口I / O需求。 在一个实施例中，接口电路可以使用多个掩码可编程单向接口缓冲电路来实现。 可以通过在集成电路的单个金属层中的接口缓冲电路中重新布线导体，基于期望的专用器件的需要来反转任何所需数量的接口缓冲电路的方向。 在另一个实施例中，接口电路可以使用硬件可配置的双向接口缓冲电路来实现。

公开(公告)号：US20110298492A1

公开(公告)日：2011-12-08

申请号：US13212522

申请日：2011-08-18

Applicant: Ket-Chong Yap ,  Senani Gunaratna ,  Wilma Waiman Shiao

Inventor： Ket-Chong Yap ,  Senani Gunaratna ,  Wilma Waiman Shiao

IPC: H03K19/177 ,  H01L21/82

CPC classification number: H03K19/17744 ,  H03K19/17732 ,  H03K19/17796

Abstract: An integrated circuit includes a programmable logic device, a dedicated device, and an interface circuit between the two. The interface circuit can be easily modified to accommodate the different interface I/O demands of various dedicated devices that may be embedded into the integrated circuit. In one embodiment, the interface circuit may be implemented using a plurality of mask programmable uni-directional interface buffer circuits. The direction of any desired number of the interface buffer circuits can be reversed based on the needs of a desired dedicated device by re-routing the conductors in the interface buffer circuits in a single metal layer of the integrated circuit. In another embodiment, the interface circuit may be implemented using a hardware configurable bi-directional interface buffer circuit.

Abstract translation: 集成电路包括可编程逻辑器件，专用器件和两者之间的接口电路。 可以容易地修改接口电路以适应可嵌入到集成电路中的各种专用设备的不同接口I / O需求。 在一个实施例中，接口电路可以使用多个掩码可编程单向接口缓冲电路来实现。 可以通过在集成电路的单个金属层中的接口缓冲电路中重新布线导体，基于期望的专用器件的需要来反转任何所需数量的接口缓冲电路的方向。 在另一个实施例中，接口电路可以使用硬件可配置的双向接口缓冲电路来实现。

公开(公告)号：US07482834B2

公开(公告)日：2009-01-27

申请号：US11551201

申请日：2006-10-19

Applicant: Ajithkumar V. Dasari ,  Wilma Waiman Shiao ,  Tarachand G. Pagarani

Inventor： Ajithkumar V. Dasari ,  Wilma Waiman Shiao ,  Tarachand G. Pagarani

IPC: G06F7/38 ,  H03K19/177

CPC classification number: H03K19/1737

Abstract: An implementation of multiplexer functionality using a multiplexer having half the number of input ports as it has possible output values is provided. A multiplexer having two data input ports performs the function of a multiplexer having four predetermined data input signals (A1, A2, A3, A4). In general, a multiplexer having only m data input ports performs the function of a multiplexer having twice as many predetermined data input signals A1, A2, . . . , Aj, where j=m*2. The multiplexer functionality may be implemented using a programmable device having one or more macrocells, an inverter and switches such as antifuses.

Abstract translation: 提供了使用具有一半输入端口的多路复用器的多路复用器功能的实现，因为它具有可能的输出值。 具有两个数据输入端口的复用器执行具有四个预定数据输入信号（A1，A2，A3，A4）的多路复用器的功能。 通常，仅具有m个数据输入端口的复用器执行具有两倍于预定数据输入信号A1，A2的复用器的功能。 。 。 ，Aj，其中j = m * 2。 多路复用器功能可以使用具有一个或多个宏小区的可编程设备，逆变器以及诸如反熔丝的开关来实现。

公开(公告)号：US20080094103A1

公开(公告)日：2008-04-24

申请号：US11551201

申请日：2006-10-19

Applicant: Ajithkumar V. Dasari ,  Wilma Waiman Shiao ,  Tarachand G. Pagarani

Inventor： Ajithkumar V. Dasari ,  Wilma Waiman Shiao ,  Tarachand G. Pagarani

IPC: H03K19/177

CPC classification number: H03K19/1737

Abstract: An implementation of multiplexer functionality using a multiplexer having half the number of input ports as it has possible output values is provided. A multiplexer having two data input ports performs the function of a multiplexer having four predetermined data input signals (A1, A2, A3, A4). In general, a multiplexer having only m data input ports performs the function of a multiplexer having twice as many predetermined data input signals A1, A2, . . . , Aj, where j=m*2. The multiplexer functionality may be implemented using a programmable device having one or more macrocells, an inverter and switches such as antifuses.

Abstract translation: 提供了使用具有一半输入端口的多路复用器的多路复用器功能的实现，因为它具有可能的输出值。 具有两个数据输入端口的多路复用器执行多路复用器的功能，该多路复用器具有四个预定的数据输入信号（A 1，N 2，A 3，A 3， A 4 ）。 通常，仅具有m个数据输入端口的多路复用器执行具有两倍于预定数据输入信号A 1，A 2 2的复用器的功能。 。 。 ，其中j = m * 2。 多路复用器功能可以使用具有一个或多个宏小区的可编程设备，逆变器以及诸如反熔丝的开关来实现。