Invention Grant
- Patent Title: Low power mode
- Patent Title (中): 低功耗模式
-
Application No.: US11563632Application Date: 2006-11-27
-
Publication No.: US07646216B2Publication Date: 2010-01-12
- Inventor: Wilma Waiman Shiao , Stephen U. Yao , Ket-Chong Yap
- Applicant: Wilma Waiman Shiao , Stephen U. Yao , Ket-Chong Yap
- Applicant Address: US CA Sunnyvale
- Assignee: QuickLogic Corporation
- Current Assignee: QuickLogic Corporation
- Current Assignee Address: US CA Sunnyvale
- Main IPC: G06F7/38
- IPC: G06F7/38 ; H03K19/173 ; H03K19/177 ; H01L25/00

Abstract:
An apparatus and method of reducing power consumption across a switch, such as an unprogrammed antifuse, is provided. The invention applies to antifuses, other switches such as transistor based switches, (e.g., FLASH, EEPROM and/or SRAM) and other devices exhibiting a leakage current, especially during a sleep or stand-by mode. During a sleep mode, such switches or other devices may be uncoupled from signals driving the switches, then terminals of each switch may be coupled to a common potential or allowed to float to a common potential thereby eliminating or reducing leakage currents through the switches.
Public/Granted literature
- US20080122483A1 Low Power Mode Public/Granted day:2008-05-29
Information query