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    LTPS array substrate and method for producing the same
    3.
    发明授权
    LTPS array substrate and method for producing the same 有权

    公开(公告)号：US10170506B2

    公开(公告)日：2019-01-01

    申请号：US15863991

    申请日：2018-01-08

    Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. ,  Wuhan China Star Optoelectronics Technology Co., Ltd.

    Inventor： Cong Wang ,  Peng Du

    IPC: H01L29/66 ,  H01L29/786 ,  H01L27/12 ,  H01L21/28

    Abstract: An LTPS array substrate and a method for producing the same are proposed. The method includes: forming an insulating layer, a semiconductor layer, and a first positive photoresist layer on the substrate one by one; exposing one side of the substrate on the opposite side of the gate for forming a polycrystalline silicon layer; forming a source and a drain of the TFT on the polycrystalline silicon layer; forming a pixel electrode on the insulating layer and part of the source; forming a plain passivation layer on a source-drain electrode layer; forming a transparent electrode layer on the plain passivation layer so that the transparent electrode layer is connected to the gate, the source, and the drain via the contact hole. The use of masks in types and numbers in the LTPS technology can be reduced. Thus, both of the processes and the production costs are reduced.

    LTPS array substrate and method for producing the same
    5.
    发明授权
    LTPS array substrate and method for producing the same 有权

    公开(公告)号：US10529750B2

    公开(公告)日：2020-01-07

    申请号：US15863993

    申请日：2018-01-08

    Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. ,  Wuhan China Star Optoelectronics Technology Co., Ltd.

    Inventor： Cong Wang ,  Peng Du

    IPC: H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L21/28 ,  H01L21/84

    Abstract: An LTPS array substrate includes: a substrate on which a gate is disposed. An insulating layer and a polycrystalline silicon layer are disposed in sequence on the substrate and the gate. The insulating layer has an upper surface that is a plane. A source and a drain are disposed on the polycrystalline silicon layer and a pixel electrode is disposed on the insulating layer and a part of the drain. A plain passivation layer is disposed on the source and drain and includes a contact via formed therein at a location outside the polycrystalline silicon layer to expose a surface of one of the gate, the source, and the drain. A transparent electrode layer is disposed on the plain passivation layer to be electrically connected to the surface of the one of the gate, the source, and the drain that is exposed through the contact via.

    LTPS array substrate
    8.
    发明授权
    LTPS array substrate 有权

    公开(公告)号：US10192902B2

    公开(公告)日：2019-01-29

    申请号：US15853832

    申请日：2017-12-24

    Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. ,  Wuhan China Star Optoelectronics Technology Co., Ltd.

    Inventor： Cong Wang ,  Peng Du ,  Xiaoxiao Wang

    IPC: H01L27/12 ,  G02F1/1368 ,  H01L29/786

    Abstract: A method for manufacturing a LTPS array substrate includes: forming a source electrode and a drain electrode on a substrate, forming a poly-silicon layer in a first region and a second region of the substrate including the source electrode and the drain electrode, such that the poly-silicon layer of the first region has a thickness greater than that of the second region and the poly-silicon layer of the first region partially covers the source electrode and the drain electrode; passivating a surface of the poly-silicon layer in order to turn a part of the poly-silicon layer of the second region and the first region that is adjacent to the surface into an insulating layer; and forming a gate electrode on the insulating layer between the source electrode and the drain electrode. The LTPS technical process is simple and can reduce the producing costs.

    Fanout wiring structure and liquid crystal display (LCD) panel using the same
    9.
    发明授权
    Fanout wiring structure and liquid crystal display (LCD) panel using the same 有权

    公开(公告)号：US10101622B2

    公开(公告)日：2018-10-16

    申请号：US14907393

    申请日：2016-01-06

    Applicant: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.

    Inventor： Cong Wang ,  Peng Du

    IPC: G02F1/136 ,  G02F1/1362 ,  H01L27/12 ,  G02F1/133 ,  G02F1/1345

    Abstract: A fanout wiring structure and LCD panel using the same are described. The fanout wiring structure comprises a substrate; a first wire region comprising first conductive wires with a first electric resistivity wherein each first conductive wire comprises a first end point and a second end point, and the first end point is electrically connected to the signal transmission interface; and a second wire region comprising second conductive wires with second electric resistivity wherein each second conductive wire comprises third end point and fourth end point, and the fourth end point is electrically connected to the signal receiving interface; wherein the second end point is electrically and correspondingly connected to the third end point, and each first conductive wire and each second conductive wire form either a collinear structure or a parallel connection structure to construct the fanout wiring structure for equalizing a resistance of each fanout wiring structure.

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