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公开(公告)号：US20200209694A1
公开(公告)日：2020-07-02
申请号：US16476292
申请日：2019-04-16
Inventor： Yuan YAN , Jiyue SONG
IPC: G02F1/1362 , H01L21/3205 , H01L21/324 , H01L21/3213
Abstract: An array substrate and a manufacturing method thereof in the embodiment of the present invention can complete the process of the array substrate with the touch function by using six photolithography processes, thereby simplifying the production process, saving cost, and shortening the production cycle.
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公开(公告)号：US20230246036A1
公开(公告)日：2023-08-03
申请号：US16966116
申请日：2020-01-17
Inventor： Yuan YAN , Yong XU , Fei AI , Dewei SONG
CPC classification number: H01L27/124 , G06F3/041 , H01L27/1288 , G06F2203/04103
Abstract: A touch array substrate and a manufacturing method thereof, wherein in the touch array substrate, an active layer, an insulating layer, a pixel electrode layer, a metal layer, a planarization layer, and a common electrode layer are sequentially disposed on the buffer layer. The active layer includes a first region corresponding to a source electrode and a second region corresponding to a drain electrode. The pixel electrode layer includes a plurality of base layers. The metal layer is correspondingly disposed on the base layers. The metal layer includes a touch signal line, a data line, and a gate electrode. The common electrode layer includes a touch electrode, the source electrode, and the drain electrode.
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Patent Agency Ranking
公开(公告)号：US20210080783A1
公开(公告)日：2021-03-18
申请号：US16080238
申请日：2018-05-02
Inventor： Yuan YAN
IPC: G02F1/1335 , G02B5/18 , G02B5/30 , C23F1/02 , G03F7/30
Abstract: A polarization grating having a light-shielding layer and a manufacturing method for the same are disclosed. The method includes steps of: forming a metal layer on a substrate, forming a shielding layer on the metal layer, wherein the shielding layer includes a light-shielding pattern layer and a polarization grating pattern layer and etching the metal layer 20 according to the shielding layer to form a polarization grating, wherein the polarization grating includes a polarization section and a light-shielding section directly connected to the polarization section. The present invention improves the compactness of the display panel.
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公开(公告)号：US20240096899A1
公开(公告)日：2024-03-21
申请号：US18522222
申请日：2023-11-29
Inventor： Yuan YAN
CPC classification number: H01L27/1214 , G06F3/0412 , G06F3/0421 , G06V40/13 , G06V40/1318 , H01L27/1251 , H01L31/0284 , H01L31/10 , G06F2203/04103 , G06F2203/04107
Abstract: Display panels are provided. The display panel includes a substrate and a thin film transistor (TFT) disposed on the substrate. The TFT includes a polysilicon layer, a gate layer, and a source-drain contacting layer. The polysilicon layer includes a first portion corresponding to the gate layer, two second portions disposed on two opposite sides of the first portion, two third portions disposed on two outer sides of the two second portions away from the first portion, and a fourth portion. The fourth portion is disposed on one of the two third portions to define a PN structure therebetween. The source-drain contacting layer is disposed on the gate layer and electrically contacts the fourth portion and the two third portions.
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5.发明申请公开(公告)号：US20210184050A1
公开(公告)日：2021-06-17
申请号：US16344018
申请日：2018-11-19
Inventor： Lisheng LI , Peng HE , Yuan YAN
IPC: H01L29/786 , H01L29/66 , H01L29/10 , H01L21/02
Abstract: A low temperature polysilicon layer, a thin film transistor, and a method for manufacturing same are provided. The low temperature polysilicon layer includes a substrate, at least one buffer layer, and a polysilicon layer. The polysilicon layer is disposed on the at least one buffer layer. The polysilicon layer includes a channel region, two low doped regions disposed on two sides of the channel region, and two high doped regions disposed on an outer side of the low doped regions. Thicknesses of an edge of the channel region and at least one portion of the low doped regions are less than a thickness of another position of the polysilicon layer.
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公开(公告)号：US20210074742A1
公开(公告)日：2021-03-11
申请号：US16641663
申请日：2019-11-06
Abstract: A manufacturing method of an array substrate and the array substrate are provided. The method comprises: forming an active layer on a substrate; forming an insulation layer on the active layer; forming a first metal layer on the insulation layer; forming an interlayer dielectric layer and a pixel electrode layer on the first metal layer by a same mask; forming a second metal layer on the interlayer dielectric layer, wherein the second metal layer comprises a source electrode, a drain electrode, and a touch signal line; and forming a patterned protective layer and a patterned common electrode layer on the second metal layer.
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公开(公告)号：US20190333945A1
公开(公告)日：2019-10-31
申请号：US16086041
申请日：2018-08-01
Inventor： Guanghui LIU , Xin ZHANG , Yuan YAN
IPC: H01L27/12 , H01L29/786 , H01L29/66 , G02F1/1343 , G02F1/1333
Abstract: A manufacturing method of a display panel is provided and includes providing a substrate; and forming a buffer layer, a polysilicon layer, a gate electrode, an interlayer insulating layer, a first transparent electrode layer, a source electrode and drain electrode line, and a touch control line on the substrate in sequence. A masking process is omitted using a planarization layer as a photoresist layer of the interlayer insulating layer. One more masking process is omitted by forming the pixel electrode, the source electrode and drain electrode line and the touch control line in a same masking process.
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