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公开(公告)号:US20230246036A1
公开(公告)日:2023-08-03
申请号:US16966116
申请日:2020-01-17
Inventor: Yuan YAN , Yong XU , Fei AI , Dewei SONG
CPC classification number: H01L27/124 , G06F3/041 , H01L27/1288 , G06F2203/04103
Abstract: A touch array substrate and a manufacturing method thereof, wherein in the touch array substrate, an active layer, an insulating layer, a pixel electrode layer, a metal layer, a planarization layer, and a common electrode layer are sequentially disposed on the buffer layer. The active layer includes a first region corresponding to a source electrode and a second region corresponding to a drain electrode. The pixel electrode layer includes a plurality of base layers. The metal layer is correspondingly disposed on the base layers. The metal layer includes a touch signal line, a data line, and a gate electrode. The common electrode layer includes a touch electrode, the source electrode, and the drain electrode.
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公开(公告)号:US20170068024A1
公开(公告)日:2017-03-09
申请号:US14891391
申请日:2015-09-14
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor: Yong XU
IPC: G02B5/20
CPC classification number: G02B5/201
Abstract: A color filter substrate is provided, and includes a glass substrate, a color filter layer and a planar layer. The color filter layers include three color barrier layers and two light-shading layers. Two of the light-shading layers overlap in light-shading regions. A manufacturing method of a color filter substrate is provided, and includes sequentially forming three color barrier layers on a glass substrate, wherein a part of one of a first color barrier layer or a second color barrier layer forms a first light-shading layer, and a part of a third color barrier layer forms a second light-shading layer.
Abstract translation: 提供一种滤色器基板,包括玻璃基板,滤色器层和平面层。 滤色器层包括三个阻挡层和两个遮光层。 两个遮光层在遮光区域中重叠。 提供了一种滤色器基板的制造方法,并且包括在玻璃基板上依次形成三色阻挡层,其中,第一着色阻挡层或第二遮光层中的一个的一部分形成第一遮光层,以及 第三遮光层的一部分形成第二遮光层。
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公开(公告)号:US20230113882A1
公开(公告)日:2023-04-13
申请号:US17278722
申请日:2021-02-05
Inventor: Tao MA , Yong XU , Wanglin WEN , Fei AI
IPC: H01L27/12 , H01L29/786
Abstract: An array substrate includes a substrate, a first metal layer and an active layer disposed on the substrate, an interlayer insulating layer, and a second metal layer. The first metal layer forms at least one first trace, the interlayer insulating layer is disposed on the first metal layer and the active layer, the second metal layer is disposed on the interlayer insulating layer, the interlayer insulating layer is formed with a first contact hole, and the second metal layer is connected to the first trace through the first contact hole. The first metal layer includes a conductive layer and a first protective layer stacked in sequence.
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公开(公告)号:US20210408068A1
公开(公告)日:2021-12-30
申请号:US16757130
申请日:2019-11-14
Inventor: Juncheng XIAO , Yong XU , Fei AI , Guoheng YIN
IPC: H01L27/12
Abstract: An array substrate, a method of manufacturing the same, and a display device are provided. The array substrate includes a first active layer and a second active layer. A material of the first active layer comprises low temperature poly-silicon. A material of the second active layer comprises an oxide semiconductor. The first active layer and the second active layer are disposed at different layers and horizontally staggered.
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公开(公告)号:US20230163136A1
公开(公告)日:2023-05-25
申请号:US16966119
申请日:2020-04-20
Inventor: Juncheng XIAO , Yong XU , Fei AI , Dewei SONG
IPC: H01L27/12
CPC classification number: H01L27/1225 , H01L27/1288 , H01L27/1285
Abstract: A display panel, an array substrate, and a manufacturing method thereof, wherein the array substrate includes a thin film transistor device, and an interface layer, a first transparent conductive layer, a passivation layer, and a second transparent conductive layer which are formed on the thin film transistor device in sequence. By replacing a planarization layer in the prior art with the interface layer, performing a gate re-etching process, and perforating the interface layer and the passivation layer to simultaneously form a deep via and a shallow via, a number of photomasks required to form the array substrate is reduced to 8. It effectively reduces costs of production materials and costs of photomasks.
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