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公开(公告)号:US20230113882A1
公开(公告)日:2023-04-13
申请号:US17278722
申请日:2021-02-05
Inventor: Tao MA , Yong XU , Wanglin WEN , Fei AI
IPC: H01L27/12 , H01L29/786
Abstract: An array substrate includes a substrate, a first metal layer and an active layer disposed on the substrate, an interlayer insulating layer, and a second metal layer. The first metal layer forms at least one first trace, the interlayer insulating layer is disposed on the first metal layer and the active layer, the second metal layer is disposed on the interlayer insulating layer, the interlayer insulating layer is formed with a first contact hole, and the second metal layer is connected to the first trace through the first contact hole. The first metal layer includes a conductive layer and a first protective layer stacked in sequence.