公开(公告)号：US20220344248A1

公开(公告)日：2022-10-27

申请号：US17235944

申请日：2021-04-21

申请人： Unimicron Technology Corp.

发明人： John Hon-Shing Lau ,  Cheng-Ta Ko ,  Pu-Ju Lin ,  Kai-Ming Yang ,  Chi-Hai Kuo ,  Chia-Yu Peng ,  Tzyy-Jang Tseng

IPC分类号： H01L23/498 ,  H01L25/065 ,  H01L23/538 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

摘要： A package structure includes a redistribution layer, a chip assembly, a plurality of solder balls, and a molding compound. The redistribution layer includes redistribution circuits, photoimageable dielectric layers, conductive through holes, and chip pads. One of the photoimageable dielectric layers located on opposite two outermost sides has an upper surface and openings. The chip pads are located on the upper surface and are electrically connected to the redistribution circuits through the conductive through holes. The openings expose portions of the redistribution circuits to define solder ball pads. Line widths and line spacings of the redistribution circuits decrease in a direction from the solder ball pads towards the chip pads. The chip assembly is disposed on the chip pads and includes at least two chips with different sizes. The solder balls are disposed on the solder ball pads, and the molding compound at least covers the chip assembly.

公开(公告)号：US11710690B2

公开(公告)日：2023-07-25

申请号：US17233551

申请日：2021-04-19

申请人： Unimicron Technology Corp.

发明人： John Hon-Shing Lau ,  Cheng-Ta Ko ,  Pu-Ju Lin ,  Kai-Ming Yang ,  Chia-Yu Peng ,  Chi-Hai Kuo ,  Tzyy-Jang Tseng

IPC分类号： H01L23/498 ,  H01L21/48 ,  H01L23/00

CPC分类号： H01L23/49816 ,  H01L21/486 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/13147 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/16238

摘要： A package structure includes at least one first redistribution layer, at least one second redistribution layer, a chip pad, a solder ball pad, a chip, a solder ball, and a molding compound. The first redistribution layer includes a first dielectric layer and a first redistribution circuit that fills a first opening and a second opening of the first dielectric layer. The first dielectric layer is aligned with the first redistribution circuit. The second redistribution layer includes a second and a third dielectric layers and a second redistribution circuit. The third dielectric layer is aligned with the second redistribution circuit. The chip pad and the solder ball pad are electrically connected to the first and the second redistribution circuits respectively. The chip and the solder ball are disposed on the chip pad and the solder ball pad respectively. The molding compound at least covers the chip and the chip pad.

公开(公告)号：US11682612B2

公开(公告)日：2023-06-20

申请号：US17235944

申请日：2021-04-21

申请人： Unimicron Technology Corp.

发明人： John Hon-Shing Lau ,  Cheng-Ta Ko ,  Pu-Ju Lin ,  Kai-Ming Yang ,  Chi-Hai Kuo ,  Chia-Yu Peng ,  Tzyy-Jang Tseng

IPC分类号： H01L23/538 ,  H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L25/065

CPC分类号： H01L23/49816 ,  H01L21/486 ,  H01L21/4857 ,  H01L21/565 ,  H01L23/3135 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L25/0655 ,  H01L2224/13147 ,  H01L2224/13582 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/73204 ,  H01L2924/1434 ,  H01L2924/14335 ,  H01L2924/35

摘要： A package structure includes a redistribution layer, a chip assembly, a plurality of solder balls, and a molding compound. The redistribution layer includes redistribution circuits, photoimageable dielectric layers, conductive through holes, and chip pads. One of the photoimageable dielectric layers located on opposite two outermost sides has an upper surface and openings. The chip pads are located on the upper surface and are electrically connected to the redistribution circuits through the conductive through holes. The openings expose portions of the redistribution circuits to define solder ball pads. Line widths and line spacings of the redistribution circuits decrease in a direction from the solder ball pads towards the chip pads. The chip assembly is disposed on the chip pads and includes at least two chips with different sizes. The solder balls are disposed on the solder ball pads, and the molding compound at least covers the chip assembly.

公开(公告)号：US11516910B1

公开(公告)日：2022-11-29

申请号：US17371114

申请日：2021-07-09

申请人： Unimicron Technology Corp.

发明人： Chia-Yu Peng ,  John Hon-Shing Lau ,  Kai-Ming Yang ,  Pu-Ju Lin ,  Cheng-Ta Ko ,  Tzyy-Jang Tseng

IPC分类号： H01R12/52 ,  H05K1/02 ,  H05K1/11 ,  H05K3/24 ,  H05K3/06 ,  H05K3/40

摘要： A circuit board structure includes a redistribution structure layer, a build-up circuit structure layer, and a connection structure layer. The redistribution structure layer has a first and second surface, and includes an inner and outer dielectric layer, first connecting pads, and chip pads. A bottom surface of each first connecting pad is aligned with the first surface, and the chip pads are protruded from and located on the second surface. The build-up circuit structure layer includes second connecting pads. The connection structure layer is disposed between the redistribution structure layer and the build-up circuit structure layer and includes a substrate and conductive paste pillars penetrating the substrate. The first connecting pads are electrically connected to the second connecting pads via the conductive paste pillars, respectively. A top surface of each conductive paste pillar is aligned with the first surface of the redistribution structure layer.

公开(公告)号：US20240014145A1

公开(公告)日：2024-01-11

申请号：US18470427

申请日：2023-09-20

申请人： Unimicron Technology Corp.

发明人： Kai-Ming Yang ,  Chia-Yu Peng ,  John Hon-Shing Lau

IPC分类号： H01L23/552 ,  H01L23/00 ,  H01L21/56 ,  H01L21/78

CPC分类号： H01L23/552 ,  H01L24/13 ,  H01L21/561 ,  H01L21/78 ,  H01L2924/182 ,  H01L2224/13024

摘要： An integrated circuit (IC) package structure includes a chip, a redistribution layer (RDL) structure, a molding compound structure and an electromagnetic interference (EMI) shielding structure. The RDL structure is formed on the chip and electrically connected thereto. The molding compound layer is provided on outer surfaces of the chip and the RDL structure. The EMI shielding structure is provided on outer surfaces of the molding compound structure. The molding compound structure layer provided on outer surfaces of the chip and the RDL structure provide protection and reinforcement to multiple faces of the IC package structure; and the EMI shielding structure provided on outer surfaces of the molding compound structure provides EMI protection to multiple faces of the chip and the RDL structure.

公开(公告)号：US20220328387A1

公开(公告)日：2022-10-13

申请号：US17232128

申请日：2021-04-15

申请人： Unimicron Technology Corp.

发明人： John Hon-Shing Lau ,  Cheng-Ta Ko ,  Pu-Ju Lin ,  Kai-Ming Yang ,  Chi-Hai Kuo ,  Chia-Yu Peng ,  Tzyy-Jang Tseng

IPC分类号： H01L23/498 ,  H01L21/48 ,  H01L21/683

摘要： A package carrier includes a first redistribution layer having a first upper surface and a first lower surface and including a plurality of first redistribution circuits, a plurality of conductive through holes, a plurality of photoimageable dielectric layers, and a plurality of chip pads and a second redistribution layer disposed on the first upper surface of the first redistribution layer. The second redistribution layer has a second upper surface and a second lower surface aligned with and directly connected to the first upper surface of the first redistribution layer and includes a plurality of second redistribution circuits, a plurality of conductive structures, a plurality of Ajinomoto build-up Film (ABF) layers, and a plurality of solder ball pads. A line width and a line pitch of each of the first redistribution circuits are smaller than a line width and a line pitch of each of the second redistribution circuits.

公开(公告)号：US20220069489A1

公开(公告)日：2022-03-03

申请号：US17319109

申请日：2021-05-13

申请人： Unimicron Technology Corp.

发明人： John Hon-Shing Lau ,  Chia-Yu Peng ,  Kai-Ming Yang ,  Pu-Ju Lin ,  Cheng-Ta Ko ,  Tzyy-Jang Tseng

IPC分类号： H01R12/52 ,  H01L21/48 ,  H01L23/498 ,  H01R4/04 ,  H01R43/00

摘要： A circuit board structure, including a redistribution circuit structure layer, a build-up circuit structure layer, and a connection structure layer, is provided. The redistribution circuit structure layer includes multiple first connecting pads. The build-up circuit structure layer is disposed on one side of the redistribution circuit structure layer and includes multiple second connecting pads. A line width and a line spacing of the redistribution circuit structure layer are smaller than a line width and a line spacing of the build-up circuit structure layer. The connection structure layer is disposed between the redistribution circuit structure layer and the build-up circuit structure layer, and includes a substrate and multiple conductive paste pillars penetrating the substrate. The first connecting pads are electrically connected to the second connecting pads respectively through the conductive paste pillars. The first connecting pads and the second connecting pads are respectively embedded in two opposite surfaces of the substrate.

公开(公告)号：US20240237202A9

公开(公告)日：2024-07-11

申请号：US17992933

申请日：2022-11-23

申请人： Unimicron Technology Corp.

发明人： Kai-Ming Yang ,  Chia-Yu Peng ,  Cheng-Ta Ko ,  Pu-Ju Lin

IPC分类号： H05K1/02 ,  H05K1/11 ,  H05K3/46

CPC分类号： H05K1/0298 ,  H05K1/11 ,  H05K3/4644 ,  H05K2203/041

摘要： A circuit board structure includes a carrier, a thin film redistribution layer disposed on the carrier, solder balls electrically connected to the thin film redistribution layer and the carrier, and a surface treatment layer. The thin film redistribution layer includes a first dielectric layer, pads, a first metal layer, a second dielectric layer, a second metal layer, and a third dielectric layer. A top surface of the first dielectric layer is higher than an upper surface of each pad. The first metal layer is disposed on a first surface of the first dielectric layer. The second dielectric layer has second openings exposing part of the first metal layer. The second metal layer extends into the second openings and is electrically connected to the first metal layer. The third dielectric layer has third openings exposing part of the second metal layer. The surface treatment layer is disposed on the upper surfaces.

公开(公告)号：US20220336333A1

公开(公告)日：2022-10-20

申请号：US17233551

申请日：2021-04-19

申请人： Unimicron Technology Corp.

发明人： John Hon-Shing Lau ,  Cheng-Ta Ko ,  Pu-Ju Lin ,  Kai-Ming Yang ,  Chia-Yu Peng ,  Chi-Hai Kuo ,  Tzyy-Jang Tseng

IPC分类号： H01L23/498 ,  H01L21/48 ,  H01L23/00

摘要： A package structure includes at least one first redistribution layer, at least one second redistribution layer, a chip pad, a solder ball pad, a chip, a solder ball, and a molding compound. The first redistribution layer includes a first dielectric layer and a first redistribution circuit that fills a first opening and a second opening of the first dielectric layer. The first dielectric layer is aligned with the first redistribution circuit. The second redistribution layer includes a second and a third dielectric layers and a second redistribution circuit. The third dielectric layer is aligned with the second redistribution circuit. The chip pad and the solder ball pad are electrically connected to the first and the second redistribution circuits respectively. The chip and the solder ball are disposed on the chip pad and the solder ball pad respectively. The molding compound at least covers the chip and the chip pad.

公开(公告)号：US20220208630A1

公开(公告)日：2022-06-30

申请号：US17155094

申请日：2021-01-22

申请人： Unimicron Technology Corp.

发明人： Kai-Ming Yang ,  Chia-Yu Peng ,  Pei-Chi Chen ,  Pu-Ju Lin ,  Cheng-Ta Ko

IPC分类号： H01L23/31 ,  H01L23/498 ,  H01L21/56 ,  H01L21/78

摘要： A chip packaging structure includes a chip, a redistribution layer, a solder ball, an encapsulant, and a stress buffer layer. The chip has an active surface and a back surface opposite to each other, and a peripheral surface connected to the active surface and the back surface. The redistribution layer is disposed on the active surface of the chip. The solder ball is disposed on the redistribution layer, and the chip is electrically connected to the solder ball through the redistribution layer. The encapsulant encapsulates the active surface and the back surface of the chip, the redistribution layer, and part of the solder ball. The stress buffer layer at least covers the peripheral surface of the chip. An outer surface of the stress buffer layer is aligned with a side surface of the encapsulant.