公开(公告)号：US12176414B2

公开(公告)日：2024-12-24

申请号：US17333045

申请日：2021-05-28

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Yu Yang

IPC: H01L29/66 ,  H01L29/20 ,  H01L29/778

Abstract: A method for forming a HEMT is disclosed. A substrate is provided. A buffer layer, a channel layer on the buffer layer, a barrier layer on the channel layer, and a semiconductor gate layer on the barrier layer are formed on the substrate. A metal gate layer is formed on the semiconductor gate layer. A spacer is formed on sidewalls of the metal gate layer. The semiconductor gate layer is then etched by using the spacer and the metal gate layer as an etching mask. A passivation layer is then formed to cover the barrier layer, the semiconductor gate layer and the metal gate layer. An opening is formed in the passivation layer to expose the metal gate layer. A gate electrode is formed on the passivation layer and in direct contact with the metal gate layer.

公开(公告)号：US20240204075A1

公开(公告)日：2024-06-20

申请号：US18590985

申请日：2024-02-29

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Yu Yang

IPC: H01L29/423 ,  H01L27/092 ,  H01L29/786

CPC classification number: H01L29/42392 ,  H01L27/092 ,  H01L29/78696

Abstract: A manufacturing method of a semiconductor device includes the following steps. A first transistor is formed on a substrate. The first transistor includes a first semiconductor channel structure and two first source/drain structures. The first semiconductor channel structure includes first horizontal portions and a first vertical portion. The first horizontal portions are stacked in a vertical direction and separated from one another. Each of the first horizontal portions is elongated in a horizontal direction. The first vertical portion is elongated in the vertical direction and connected with the first horizontal portions. The two first source/drain structures are disposed at two opposite sides of each of the first horizontal portions in the horizontal direction respectively. The two first source/drain structures are connected with the first horizontal portions. A top surface of the first vertical portion in and a top surface of one of the first horizontal portions are coplanar.

公开(公告)号：US11948990B2

公开(公告)日：2024-04-02

申请号：US17990749

申请日：2022-11-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Yu Yang

IPC: H01L29/423 ,  H01L27/092 ,  H01L29/786

CPC classification number: H01L29/42392 ,  H01L27/092 ,  H01L29/78696

Abstract: A manufacturing method of a semiconductor device includes the following steps. A first transistor is formed on a substrate. The first transistor includes a first semiconductor channel structure and two first source/drain structures. The first semiconductor channel structure includes first horizontal portions and a first vertical portion. The first horizontal portions are stacked in a vertical direction and separated from one another. Each of the first horizontal portions is elongated in a horizontal direction. The first vertical portion is elongated in the vertical direction and connected with the first horizontal portions. The two first source/drain structures are disposed at two opposite sides of each of the first horizontal portions in the horizontal direction respectively. The two first source/drain structures are connected with the first horizontal portions.

公开(公告)号：US11935948B2

公开(公告)日：2024-03-19

申请号：US17988720

申请日：2022-11-16

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Yu Yang

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/205 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/7786 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/4232 ,  H01L29/66462

Abstract: An HEMT includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer. The composition of the first III-V compound layer is different from the composition of the second III-V compound layer. A third III-V compound layer is disposed on the second III-V compound layer. The first III-V compound layer and the third III-V compound layer are composed of the same group III-V elements. The third III-V compound layer includes a body and numerous finger parts. Each of the finger parts is connected to the body. All finger parts are parallel to each other and do not contact each other. A source electrode, a drain electrode and a gate electrode are disposed on the first III-V compound layer.

公开(公告)号：US11855174B2

公开(公告)日：2023-12-26

申请号：US17203723

申请日：2021-03-16

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Yu Yang ,  Hsun-Wen Wang

IPC: H01L29/66 ,  H01L29/778

CPC classification number: H01L29/66431 ,  H01L29/7786

Abstract: A high electron mobility transistor (HEMT) includes a substrate, a channel layer disposed on the substrate, a barrier layer disposed on the channel layer, a first passivation layer disposed on the barrier layer, a plurality of trenches through at least a portion of the first passivation layer, and a conductive plate structure disposed on the first passivation layer. The conductive plate structure includes a base portion over the trenches and a plurality of protruding portions extending from a lower surface of the base portion and into the trenches.

公开(公告)号：US20230268440A1

公开(公告)日：2023-08-24

申请号：US17700530

申请日：2022-03-22

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Yu Yang ,  Fang-Yun Liu ,  Chien-Tung Yue ,  Kuo-Liang Yeh ,  Mu-Kai Tsai ,  Jinn-Horng Lai ,  Cheng-Hsiung Chen

IPC: H01L29/78 ,  H01L27/092 ,  H01L23/58

CPC classification number: H01L29/7845 ,  H01L27/092 ,  H01L23/585

Abstract: A semiconductor device includes a substrate, a first transistor disposed on the substrate, a second transistor in proximity to the first transistor on the substrate, at least one interlayer dielectric layer covering the first transistor and the second transistor, a first stress-inducing dummy metal pattern disposed on the at least one interlayer dielectric layer and directly above the first transistor, and a second stress-inducing dummy metal pattern disposed on the at least one interlayer dielectric layer and directly above the second transistor.

公开(公告)号：US11721751B2

公开(公告)日：2023-08-08

申请号：US17153844

申请日：2021-01-20

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Yu Yang

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/66 ,  H01L29/47 ,  H01L21/285 ,  H01L29/205 ,  H01L29/423

CPC classification number: H01L29/7786 ,  H01L21/28581 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/4238 ,  H01L29/42372 ,  H01L29/42376 ,  H01L29/475 ,  H01L29/66462

Abstract: An HEMT includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer. The composition of the first III-V compound layer is different from that of the second III-V compound layer. A gate is disposed on the second III-V compound layer. The gate includes a first P-type III-V compound layer, an undoped III-V compound layer and an N-type III-V compound layer are deposited from bottom to top. The first P-type III-V compound layer, the undoped III-V compound layer, the N-type III-V compound layer and the first III-V compound layer are chemical compounds formed by the same group III element and the same group V element. A drain electrode is disposed at one side of the gate. A drain electrode is disposed at another side of the gate. A gate electrode is disposed directly on the gate.

公开(公告)号：US20230231044A1

公开(公告)日：2023-07-20

申请号：US17671549

申请日：2022-02-14

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Yu Yang

IPC: H01L29/778 ,  H01L21/02 ,  H01L29/66

CPC classification number: H01L29/7786 ,  H01L21/0217 ,  H01L29/66462

Abstract: A method for fabricating a high electron mobility transistor (HEMT) includes the steps of first forming a buffer layer on a substrate, forming a barrier layer on the buffer layer, forming a p-type semiconductor layer on the barrier layer, forming a compressive stress layer adjacent to one side of the p-type semiconductor layer, and then forming a tensile stress layer adjacent to another side of the p-type semiconductor layer.

公开(公告)号：US20230231021A1

公开(公告)日：2023-07-20

申请号：US17669381

申请日：2022-02-11

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Yu Yang

IPC: H01L29/40 ,  H01L29/778 ,  H01L21/3115 ,  H01L29/66

CPC classification number: H01L29/408 ,  H01L21/31155 ,  H01L29/7786 ,  H01L29/66462

Abstract: A method for fabricating a high electron mobility transistor (HEMT) includes the steps of first forming a buffer layer on a substrate, forming a barrier layer on the buffer layer, forming a p-type semiconductor layer on the barrier layer, forming a first layer having a negative charge region adjacent to one side of the p-type semiconductor layer, and then forming a second layer having a positive charge region adjacent to another side of the p-type semiconductor layer.

公开(公告)号：US20220310824A1

公开(公告)日：2022-09-29

申请号：US17333045

申请日：2021-05-28

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Yu Yang

IPC: H01L29/66 ,  H01L29/20 ,  H01L29/778

Abstract: A method for forming a HEMT is disclosed. A substrate is provided. A buffer layer, a channel layer on the buffer layer, a barrier layer on the channel layer, and a semiconductor gate layer on the barrier layer are formed on the substrate. A metal gate layer is formed on the semiconductor gate layer. A spacer is formed on sidewalls of the metal gate layer. The semiconductor gate layer is then etched by using the spacer and the metal gate layer as an etching mask. A passivation layer is then formed to cover the barrier layer, the semiconductor gate layer and the metal gate layer. An opening is formed in the passivation layer to expose the metal gate layer. A gate electrode is formed on the passivation layer and in direct contact with the metal gate layer.