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    MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE
    1.
    发明申请
    MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE 有权
    半导体结构的制造方法

    公开(公告)号：US20170018432A1

    公开(公告)日：2017-01-19

    申请号：US14797478

    申请日：2015-07-13

    申请人： UNITED MICROELECTRONICS CORP.

    发明人： Ji-Gang Pan ,  Han-Chuan Fang ,  Boon-Tiong Neo

    IPC分类号： H01L21/28 ,  H01L21/3213 ,  H01L21/321 ,  H01L21/3205

    CPC分类号： H01L21/28273 ,  H01L21/32056 ,  H01L21/3212 ,  H01L21/32133 ,  H01L21/32139 ,  H01L27/11531 ,  H01L27/11541

    摘要： A manufacturing method of a semiconductor structure having an array area and a periphery area is provided. The manufacturing method includes the following steps. A substrate is provided. A plurality of trenches is formed on the substrate. The plurality of trenches is filled with insulating material to form at least one first insulating layer. A polysilicon layer is deposited on the substrate and the first insulating layer. A photoresist mask is formed on the periphery area. A portion of the polysilicon layer on the array area is etched, such that a top surface of the polysilicon layer on the array area is higher than the first insulating layer and lower than a top surface of the polysilicon layer on the periphery area. The photoresist mask is removed. A planarization process is implemented to remove a portion of the polysilicon layer on the array area and on the periphery area.

    摘要翻译： 提供具有阵列区域和周边区域的半导体结构体的制造方法。 该制造方法包括以下步骤。 提供基板。 在基板上形成多个沟槽。 多个沟槽用绝缘材料填充以形成至少一个第一绝缘层。 多晶硅层沉积在衬底和第一绝缘层上。 在周边区域上形成光刻胶掩模。 蚀刻阵列区域上的多晶硅层的一部分，使得阵列区域上的多晶硅层的顶表面高于第一绝缘层并且低于外围区域上的多晶硅层的顶表面。 去除光致抗蚀剂掩模。 实现平坦化处理以去除阵列区域和外围区域上的多晶硅层的一部分。

    Polishing method of semiconductor structure
    2.
    发明授权
    Polishing method of semiconductor structure 有权
    半导体结构抛光方法

    公开(公告)号：US08901003B1

    公开(公告)日：2014-12-02

    申请号：US14021419

    申请日：2013-09-09

    申请人： United Microelectronics Corp.

    发明人： Ji-Gang Pan ,  Han-Chuan Fang ,  Boon-Tiong Neo

    IPC分类号： H01L21/302 ,  H01L21/461 ,  H01L21/321 ,  H01L21/02

    CPC分类号： H01L21/30625 ,  H01L27/1464 ,  H01L27/14683

    摘要： A polishing method of a semiconductor device is disclosed. A substrate having a first side and a second side opposite to the first side is provided. The substrate has a device layer formed on the first side and a plurality of trench isolation structures therein extending from the first side to the second side. A main polishing step is performed to the second side of the substrate until a surface of at least one of the trench isolation structures is exposed. An auxiliary polishing step is then performed to the second side of the substrate. Besides, a silicon-to-oxide selectivity of the main polishing step is different from a silicon-to-oxide selectivity of the auxiliary step.

    摘要翻译： 公开了一种半导体器件的抛光方法。 提供具有与第一侧相对的第一侧和第二侧的基板。 衬底具有形成在第一侧上的器件层和其中从第一侧延伸到第二侧的多个沟槽隔离结构。 对衬底的第二侧进行主抛光步骤，直到暴露出至少一个沟槽隔离结构的表面。 然后对衬底的第二侧进行辅助抛光步骤。 此外，主抛光步骤的硅 - 氧化物选择性不同于辅助步骤的硅 - 氧化物选择性。