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    SEMICONDUCTOR DEVICE HAVING HIGH PERFORMANCE CHANNEL
    6.
    发明申请
    SEMICONDUCTOR DEVICE HAVING HIGH PERFORMANCE CHANNEL 有权
    具有高性能通道的半导体器件

    公开(公告)号：US20120223330A1

    公开(公告)日：2012-09-06

    申请号：US13039441

    申请日：2011-03-03

    申请人： Sarit Dhar ,  Sei-Hyung Ryu ,  Lin Cheng ,  Anant Agarwal

    发明人： Sarit Dhar ,  Sei-Hyung Ryu ,  Lin Cheng ,  Anant Agarwal

    IPC分类号： H01L29/161 ,  H01L21/22

    CPC分类号： H01L29/107 ,  H01L21/225 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/66477 ,  H01L29/66568

    摘要： Semiconductor devices having a high performance channel and method of fabrication thereof are disclosed. Preferably, the semiconductor devices are Metal-Oxide-Semiconductor (MOS) devices, and even more preferably the semiconductor devices are Silicon Carbide (SiC) MOS devices. In one embodiment, a semiconductor device includes a SiC substrate of a first conductivity type, a first well of a second conductivity type, a second well of the second conductivity type, and a surface diffused channel of the second conductivity type formed at the surface of semiconductor device between the first and second wells. A depth and doping concentration of the surface diffused channel are controlled to provide increased carrier mobility for the semiconductor device as compared to the same semiconductor device without the surface diffused channel region when in the on-state while retaining a turn-on, or threshold, voltage that provides normally-off behavior.

    摘要翻译： 公开了具有高性能通道的半导体器件及其制造方法。 优选地，半导体器件是金属氧化物半导体（MOS）器件，并且甚至更优选半导体器件是碳化硅（SiC）MOS器件。 在一个实施例中，半导体器件包括第一导电类型的SiC衬底，第二导电类型的第一阱，第二导电类型的第二阱以及形成在第二导电类型的表面处的第二导电类型的表面扩散沟道 半导体器件在第一和第二阱之间。 控制表面扩散通道的深度和掺杂浓度，以便在处于导通状态同时保持导通状态或阈值时，与没有表面扩散沟道区的相同半导体器件相比，为半导体器件提供增加的载流子迁移率， 电压提供常态动作。

    System and method for image reconstruction
    7.
    发明授权
    System and method for image reconstruction 有权
    图像重建系统和方法

    公开(公告)号：US07831097B2

    公开(公告)日：2010-11-09

    申请号：US11682013

    申请日：2007-03-05

    申请人： Yunqiang Chen ,  Lin Cheng ,  Tong Fang ,  Jason Jenn-Kwei Tyan

    发明人： Yunqiang Chen ,  Lin Cheng ,  Tong Fang ,  Jason Jenn-Kwei Tyan

    IPC分类号： G06K9/46 ,  G06K9/00 ,  G06K9/36

    CPC分类号： G01N23/046 ,  G01N2223/419 ,  G06T11/006 ,  G06T2211/421 ,  G06T2211/424

    摘要： A system and method for image reconstruction is disclosed. The method divides iterative image reconstruction into two stages, in the image and Radon space, respectively. In the first stage, filtered back projection and adaptive filtering in the image space are combined to generate a refined reconstructed image of a sinogram residue. This reconstructed image represents an update direction in the image space. In the second stage, the update direction is transformed to the Radon space, and a step size is determined to minimize a difference between the sinogram residue and a Radon transform of the refined reconstructed image of the sinogram residue in the Radon space. These stages are repeated iteratively until the solution converges.

    摘要翻译： 公开了一种用于图像重建的系统和方法。 该方法分别在图像和氡空间中将迭代图像重建分为两个阶段。 在第一阶段，滤波反投影和图像空间中的自适应滤波被组合以产生正弦图残差的精细重建图像。 该重建图像表示图像空间中的更新方向。 在第二阶段中，将更新方向转换为Radon空间，并且确定步长以最小化Radon空间中的正弦图残差的精细重建图像的正弦图残差和Radon变换之间的差异。 迭代重复这些阶段，直到解得到收敛。

    Vertical-channel junction field-effect transistors having buried gates and methods of making
    8.
    发明授权
    Vertical-channel junction field-effect transistors having buried gates and methods of making 有权
    具有掩埋栅极的垂直沟道结场效应晶体管及其制造方法

    公开(公告)号：US07638379B2

    公开(公告)日：2009-12-29

    申请号：US11935442

    申请日：2007-11-06

    申请人： Lin Cheng ,  Michael S. Mazzola

    发明人： Lin Cheng ,  Michael S. Mazzola

    IPC分类号： H01L21/337

    CPC分类号： H01L29/8083 ,  H01L29/0619 ,  H01L29/1066 ,  H01L29/1608 ,  H01L29/66909

    摘要： Semiconductor devices and methods of making the devices are described. The devices can be implemented in SiC and can include epitaxially grown n-type drift and p-type trenched gate regions, and an n-type epitaxially regrown channel region on top of the trenched p-gate regions. A source region can be epitaxially regrown on top of the channel region or selectively implanted into the channel region. Ohmic contacts to the source, gate and drain regions can then be formed. The devices can include edge termination structures such as guard rings, junction termination extensions (JTE), or other suitable p-n blocking structures. The devices can be fabricated with different threshold voltages, and can be implemented for both depletion and enhanced modes of operation for the same channel doping. The devices can be used as discrete power transistors and in digital, analog, and monolithic microwave integrated circuits.

    摘要翻译： 对半导体装置及其制造方法进行说明。 器件可以在SiC中实现，并且可以包括外延生长的n型漂移和p型沟槽栅极区域，以及在沟槽p型栅极区域顶部的n型外延再生长沟道区域。 源极区域可以在沟道区域的顶部外延再生长或选择性地植入沟道区域。 然后可以形成到源极，栅极和漏极区域的欧姆接触。 这些装置可以包括边缘终端结构，例如保护环，连接终止扩展（JTE）或其他合适的p-n阻塞结构。 这些器件可以用不同的阈值电压制造，并且可以针对相同沟道掺杂的耗尽和增强的工作模式来实现。 这些器件可用作分立功率晶体管和数字，模拟和单片微波集成电路。

    COMMUNICATION SYSTEM, COMMUNICATION DEVICE, AND METHOD FOR CAPABILITY CONTROL
    9.
    发明申请
    COMMUNICATION SYSTEM, COMMUNICATION DEVICE, AND METHOD FOR CAPABILITY CONTROL 审中-公开
    通信系统，通信设备和能力控制方法

    公开(公告)号：US20090094162A1

    公开(公告)日：2009-04-09

    申请号：US12252999

    申请日：2008-10-16

    申请人： Lin Cheng

    发明人： Lin Cheng

    IPC分类号： H04L9/00 ,  G06F15/173

    CPC分类号： G06F21/55 ,  G06F21/105 ,  G06F21/52 ,  G06F2221/2135 ,  G06F2221/2143

    摘要： A communication system includes a server for capability control, with a capability control file currently used by a corresponding device being provided in the server. The server includes a capability determination unit adapted to determine whether the summarization of the capabilities currently used by all the devices under the control of the server exceeds the capabilities limited by the capability control file; and a prohibition command sending unit adapted to send to the device a capability prohibition command corresponding to the capabilities. The device includes a capability prohibition unit adapted to prohibit the subsequent usage of the capabilities after receiving the prohibition command. A control method and a communication device are also provided.

    摘要翻译： 通信系统包括用于能力控制的服务器，其中由服务器中提供的对应设备当前使用的能力控制文件。 服务器包括能力确定单元，其适于确定在服务器控制下的所有设备当前使用的能力的汇总是否超过由能力控制文件限制的能力; 以及禁止命令发送单元，其适于向所述设备发送与所述能力相对应的能力禁止命令。 该装置包括能力禁止单元，适用于在接收到禁止命令之后禁止随后使用该能力。 还提供了一种控制方法和通信装置。

    VERTICAL-CHANNEL JUNCTION FIELD-EFFECT TRANSISTORS HAVING BURIED GATES AND METHODS OF MAKING
    10.
    发明申请
    VERTICAL-CHANNEL JUNCTION FIELD-EFFECT TRANSISTORS HAVING BURIED GATES AND METHODS OF MAKING 有权
    带通孔的垂直通道连接场效应晶体管及其制作方法

    公开(公告)号：US20080124853A1

    公开(公告)日：2008-05-29

    申请号：US11935442

    申请日：2007-11-06

    申请人： Lin Cheng ,  Michael S. Mazzola

    发明人： Lin Cheng ,  Michael S. Mazzola

    IPC分类号： H01L21/337

    CPC分类号： H01L29/8083 ,  H01L29/0619 ,  H01L29/1066 ,  H01L29/1608 ,  H01L29/66909

    摘要： Semiconductor devices and methods of making the devices are described. The devices can be implemented in SiC and can include epitaxially grown n-type drift and p-type trenched gate regions, and an n-type epitaxially regrown channel region on top of the trenched p-gate regions. A source region can be epitaxially regrown on top of the channel region or selectively implanted into the channel region. Ohmic contacts to the source, gate and drain regions can then be formed. The devices can include edge termination structures such as guard rings, junction termination extensions (JTE), or other suitable p-n blocking structures. The devices can be fabricated with different threshold voltages, and can be implemented for both depletion and enhanced modes of operation for the same channel doping. The devices can be used as discrete power transistors and in digital, analog, and monolithic microwave integrated circuits.

    摘要翻译： 对半导体装置及其制造方法进行说明。 器件可以在SiC中实现，并且可以包括外延生长的n型漂移和p型沟槽栅极区域，以及在沟槽p型栅极区域顶部的n型外延再生长沟道区域。 源极区域可以在沟道区域的顶部外延再生长或选择性地植入沟道区域。 然后可以形成到源极，栅极和漏极区域的欧姆接触。 这些装置可以包括边缘终端结构，例如保护环，连接终止扩展（JTE）或其他合适的p-n阻塞结构。 这些器件可以用不同的阈值电压制造，并且可以针对相同沟道掺杂的耗尽和增强的工作模式来实现。 这些器件可用作分立功率晶体管和数字，模拟和单片微波集成电路。