公开(公告)号：US07723757B2

公开(公告)日：2010-05-25

申请号：US11774452

申请日：2007-07-06

Applicant: Tien Fan Ou ,  Wen-Jer Tsai ,  Hsuan Ling Kao ,  Yi Ying Liao

Inventor： Tien Fan Ou ,  Wen-Jer Tsai ,  Hsuan Ling Kao ,  Yi Ying Liao

IPC: H01L29/74

CPC classification number: G11C16/0416 ,  G11C16/10 ,  H01L27/1026 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/4234 ,  H01L29/7923 ,  H01L29/7926

Abstract: A vertical nonvolatile memory cell with a charge storage structure includes a charge control structure with three nodes. Example embodiments include the individual memory cell, an array of such memory cells, methods of operating the memory cell or array of memory cells, and methods of manufacturing the same.

Abstract translation: 具有电荷存储结构的垂直非易失性存储单元包括具有三个节点的电荷控制结构。 示例性实施例包括单独的存储器单元，这种存储器单元的阵列，操作存储单元或存储单元阵列的方法及其制造方法。

公开(公告)号：US07492638B2

公开(公告)日：2009-02-17

申请号：US11619125

申请日：2007-01-02

Applicant: Hsuan Ling Kao ,  Wen Jer Tsai ,  Tien Fan Ou ,  Yi Ying Liao

Inventor： Hsuan Ling Kao ,  Wen Jer Tsai ,  Tien Fan Ou ,  Yi Ying Liao

IPC: G11C11/34

CPC classification number: G11C11/39 ,  G11C11/5671 ,  G11C16/0466 ,  H01L27/1021 ,  H01L27/115 ,  H01L27/11568

Abstract: A gated diode nonvolatile memory cell with a charge storage structure includes a diode structure with an additional gate terminal and a diffusion barrier structure between the diode nodes. Example embodiments include the individual memory cell, an array of such memory cells, methods of operating the memory cell or array of memory cells, and methods of manufacturing the same.

Abstract translation: 具有电荷存储结构的门控二极管非易失性存储单元包括具有附加栅极端子和二极管节点之间的扩散阻挡结构的二极管结构。 示例性实施例包括单独的存储器单元，这种存储器单元的阵列，操作存储单元或存储单元阵列的方法及其制造方法。

公开(公告)号：US20080117677A1

公开(公告)日：2008-05-22

申请号：US11774452

申请日：2007-07-06

Applicant: Tien Fan Ou ,  Wen Jer Tsai ,  Hsuan Ling Kao ,  Yi Ying Liao

Inventor： Tien Fan Ou ,  Wen Jer Tsai ,  Hsuan Ling Kao ,  Yi Ying Liao

IPC: G11C11/34 ,  G11C16/04

CPC classification number: G11C16/0416 ,  G11C16/10 ,  H01L27/1026 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/4234 ,  H01L29/7923 ,  H01L29/7926

Abstract: A vertical nonvolatile memory cell with a charge storage structure includes a charge control structure with three nodes. Example embodiments include the individual memory cell, an array of such memory cells, methods of operating the memory cell or array of memory cells, and methods of manufacturing the same.

Abstract translation: 具有电荷存储结构的垂直非易失性存储单元包括具有三个节点的电荷控制结构。 示例性实施例包括单独的存储器单元，这种存储器单元的阵列，操作存储单元或存储单元阵列的方法及其制造方法。

公开(公告)号：US20080117673A1

公开(公告)日：2008-05-22

申请号：US11619125

申请日：2007-01-02

Applicant: Hsuan Ling Kao ,  Wen Jer Tsai ,  Tien Fan Ou ,  Yi Ying Liao

Inventor： Hsuan Ling Kao ,  Wen Jer Tsai ,  Tien Fan Ou ,  Yi Ying Liao

IPC: G11C11/36

CPC classification number: G11C11/39 ,  G11C11/5671 ,  G11C16/0466 ,  H01L27/1021 ,  H01L27/115 ,  H01L27/11568

Abstract: A gated diode nonvolatile memory cell with a charge storage structure includes a diode structure with an additional gate terminal and a diffusion barrier structure between the diode nodes. Example embodiments include the individual memory cell, an array of such memory cells, methods of operating the memory cell or array of memory cells, and methods of manufacturing the same.

Abstract translation: 具有电荷存储结构的门控二极管非易失性存储单元包括具有附加栅极端子和二极管节点之间的扩散阻挡结构的二极管结构。 示例性实施例包括单独的存储器单元，这种存储器单元的阵列，操作存储单元或存储单元阵列的方法及其制造方法。

公开(公告)号：US20080117672A1

公开(公告)日：2008-05-22

申请号：US11619108

申请日：2007-01-02

Applicant: Hsuan Ling Kao ,  Wen Jer Tsai ,  Tien Fan Ou

Inventor： Hsuan Ling Kao ,  Wen Jer Tsai ,  Tien Fan Ou

IPC: G11C11/36 ,  H01L21/329

CPC classification number: H01L29/7391 ,  B82Y10/00 ,  G11C11/36 ,  H01L27/1021 ,  H01L27/11517 ,  H01L27/11568 ,  H01L29/8616 ,  Y10S977/938

Abstract: A gated diode nonvolatile memory cell with a charge storage structure includes a diode structure with an additional gate terminal and a diffusion barrier structure between the diode nodes. Example embodiments include the individual memory cell, an array of such memory cells, methods of operating the memory cell or array of memory cells, and methods of manufacturing the same.

Abstract translation: 具有电荷存储结构的门控二极管非易失性存储单元包括具有附加栅极端子和二极管节点之间的扩散阻挡结构的二极管结构。 示例性实施例包括单独的存储器单元，这种存储器单元的阵列，操作存储单元或存储单元阵列的方法及其制造方法。

公开(公告)号：US20080116499A1

公开(公告)日：2008-05-22

申请号：US11619082

申请日：2007-01-02

Applicant: Tien Fan Ou ,  Wen Jer Tsai ,  Erh Kun Lai ,  Hsuan Ling Kao

Inventor： Tien Fan Ou ,  Wen Jer Tsai ,  Erh Kun Lai ,  Hsuan Ling Kao

IPC: H01L29/76 ,  H01L21/336

CPC classification number: H01L29/8616 ,  G11C16/02 ,  H01L27/1021 ,  H01L29/7391

Abstract: A gated diode nonvolatile memory cell with a charge storage structure includes a diode structure with an additional gate terminal. Various embodiments may include or exclude a diffusion barrier structure between the diode nodes. Example embodiments include the individual memory cell, an array of such memory cells, methods of operating the memory cell or array of memory cells, and methods of manufacturing the same.

Abstract translation: 具有电荷存储结构的门控二极管非易失性存储单元包括具有附加栅极端子的二极管结构。 各种实施例可以包括或排除二极管节点之间的扩散阻挡结构。 示例性实施例包括单独的存储器单元，这种存储器单元的阵列，操作存储单元或存储单元阵列的方法及其制造方法。

公开(公告)号：US07768825B2

公开(公告)日：2010-08-03

申请号：US11619108

申请日：2007-01-02

Applicant: Hsuan Ling Kao ,  Wen Jer Tsai ,  Tien Fan Ou

Inventor： Hsuan Ling Kao ,  Wen Jer Tsai ,  Tien Fan Ou

IPC: G11C11/36

CPC classification number: H01L29/7391 ,  B82Y10/00 ,  G11C11/36 ,  H01L27/1021 ,  H01L27/11517 ,  H01L27/11568 ,  H01L29/8616 ,  Y10S977/938

Abstract: A gated diode nonvolatile memory cell with a charge storage structure includes a diode structure with an additional gate terminal and a diffusion barrier structure between the diode nodes. Example embodiments include the individual memory cell, an array of such memory cells, methods of operating the memory cell or array of memory cells, and methods of manufacturing the same.

Abstract translation: 具有电荷存储结构的门控二极管非易失性存储单元包括具有附加栅极端子和二极管节点之间的扩散阻挡结构的二极管结构。 示例性实施例包括单独的存储器单元，这种存储器单元的阵列，操作存储单元或存储单元阵列的方法及其制造方法。

公开(公告)号：US07419868B2

公开(公告)日：2008-09-02

申请号：US11619082

申请日：2007-01-02

Applicant: Tien Fan Ou ,  Wen Jer Tsai ,  Erh-Kun Lai ,  Hsuan Ling Kao

Inventor： Tien Fan Ou ,  Wen Jer Tsai ,  Erh-Kun Lai ,  Hsuan Ling Kao

IPC: H01L21/8234

CPC classification number: H01L29/8616 ,  G11C16/02 ,  H01L27/1021 ,  H01L29/7391

Abstract: A gated diode nonvolatile memory cell with a charge storage structure includes a diode structure with an additional gate terminal. Various embodiments may include or exclude a diffusion barrier structure between the diode nodes. Example embodiments include the individual memory cell, an array of such memory cells, methods of operating the memory cell or array of memory cells, and methods of manufacturing the same.

Abstract translation: 具有电荷存储结构的门控二极管非易失性存储单元包括具有附加栅极端子的二极管结构。 各种实施例可以包括或排除二极管节点之间的扩散阻挡结构。 示例性实施例包括单独的存储器单元，这种存储器单元的阵列，操作存储单元或存储单元阵列的方法及其制造方法。