公开(公告)号：US20080158177A1

公开(公告)日：2008-07-03

申请号：US11650042

申请日：2007-01-03

Applicant: Thomas James Wilson ,  Minh-Dieu Thi Vu ,  Yutaka Hori

Inventor： Thomas James Wilson ,  Minh-Dieu Thi Vu ,  Yutaka Hori

IPC: G06F3/041

CPC classification number: G06F3/0416

Abstract: A computer system having two or more controllers operating in a Master/Slave configuration is disclosed. In one embodiment, the computer system includes: a sensor panel having a first portion for generating a first set of sense signals indicative of a touch or no-touch condition on the first portion, and a second portion for generating a second set of sense signals indicative of a touch or no-touch condition on the second portion; a first device for receiving and processing the first set of output signals from the first portion of the panel; and a second device for receiving and processing the second set of output signals from the second portion of the panel, wherein the first and second devices operate cooperatively in a Master/Slave configuration.

Abstract translation: 公开了一种具有以主/从配置工作的两个或多个控制器的计算机系统。 在一个实施例中，计算机系统包括：传感器面板，其具有第一部分，用于产生指示第一部分上的触摸或无触摸状态的第一组感测信号;以及第二部分，用于产生第二组感测信号 指示第二部分上的触摸或不触摸状态; 第一装置，用于从面板的第一部分接收和处理第一组输出信号; 以及用于从所述面板的第二部分接收和处理所述第二组输出信号的第二装置，其中所述第一和第二装置以主/从配置协作地进行操作。

公开(公告)号：US08510481B2

公开(公告)日：2013-08-13

申请号：US11650118

申请日：2007-01-03

Applicant: Thomas James Wilson ,  Yutaka Hori

Inventor： Thomas James Wilson ,  Yutaka Hori

IPC: G06F13/28

CPC classification number: G06F3/0416

Abstract: A method and system for accessing a computer system memory without processor intervention is disclosed. In one embodiment, the method includes initiating a predetermined communication protocol between a first device and a second device, the first device including a first processor, a first memory and a first communication interface, the second device including a second processor, a second memory and a second communication interface. The predetermined communication protocol enables an access operation to be performed on the first or second memory without intervention by the first or second processor. In one embodiment, the predetermined communication protocol utilizes a plurality of predefined packet types which are identified by a packet header decoder.

Abstract translation: 公开了一种用于在没有处理器干预的情况下访问计算机系统存储器的方法和系统。 在一个实施例中，该方法包括在第一设备和第二设备之间启动预定的通信协议，第一设备包括第一处理器，第一存储器和第一通信接口，第二设备包括第二处理器，第二存储器和 第二通信接口。 预定的通信协议使得能够在第一或第二存储器上执行访问操作，而无需第一或第二处理器的干预。 在一个实施例中，预定通信协议使用由分组头解码器标识的多个预定义分组类型。

公开(公告)号：US20080162835A1

公开(公告)日：2008-07-03

申请号：US11650118

申请日：2007-01-03

Applicant: Thomas James Wilson ,  Yutaka Hori

Inventor： Thomas James Wilson ,  Yutaka Hori

IPC: G06F12/00 ,  G06F13/28

CPC classification number: G06F3/0416

Abstract: A method and system for accessing a computer system memory without processor intervention is disclosed. In one embodiment, the method includes initiating a predetermined communication protocol between a first device and a second device, the first device including a first processor, a first memory and a first communication interface, the second device including a second processor, a second memory and a second communication interface. The predetermined communication protocol enables an access operation to be performed on the first or second memory without intervention by the first or second processor. In one embodiment, the predetermined communication protocol utilizes a plurality of predefined packet types which are identified by a packet header decoder.

Abstract translation: 公开了一种无需处理器干预即可访问计算机系统存储器的方法和系统。 在一个实施例中，该方法包括在第一设备和第二设备之间启动预定的通信协议，第一设备包括第一处理器，第一存储器和第一通信接口，第二设备包括第二处理器，第二存储器和 第二通信接口。 预定的通信协议使得能够在第一或第二存储器上执行访问操作，而无需第一或第二处理器的干预。 在一个实施例中，预定通信协议使用由分组头解码器标识的多个预定义分组类型。

公开(公告)号：US08510485B2

公开(公告)日：2013-08-13

申请号：US11947723

申请日：2007-11-29

Applicant: Thomas James Wilson ,  Yutaka Hori

Inventor： Thomas James Wilson ,  Yutaka Hori

IPC: G06F3/00 ,  G06F5/00

CPC classification number: G06F13/4291 ,  G06F5/10 ,  Y02D10/14 ,  Y02D10/151

Abstract: This relates to interface circuits for synchronous protocols which do not rely on a dedicated high frequency clock signal. Instead, the interface circuit may rely on a clock signal received over the interface from another device in order to transfer data between the interface and an internal buffer. Furthermore, the interface circuits can rely on a clock signal provided by a bus for a device the interface circuit is located in to transfer data between the internal buffer and the bus. The internal buffer can be, but is not limited to a FIFO. Alternatively, it can be a stack or another data structure. The internal buffer can be configured so that each of its multiple of cells is a shift register. Thus, a preparatory step of moving a byte of data from the buffer to a separate shift register can be avoided.

Abstract translation: 这涉及不依赖于专用高频时钟信号的同步协议的接口电路。 相反，接口电路可以依赖于通过来自另一设备的接口接收的时钟信号，以便在接口和内部缓冲器之间传送数据。 此外，接口电路可以依靠总线提供的用于接口电路所在设备的时钟信号，以在内部缓冲器和总线之间传输数据。 内部缓冲器可以是但不限于FIFO。 或者，它可以是堆栈或其他数据结构。 可以配置内部缓冲器，使得其多个单元格中的每一个都是移位寄存器。 因此，可以避免将数据从缓冲器移动到单独的移位寄存器的准备步骤。

公开(公告)号：US07848825B2

公开(公告)日：2010-12-07

申请号：US11650042

申请日：2007-01-03

Applicant: Thomas James Wilson ,  Minh-Dieu Thi Vu ,  Yutaka Hori

Inventor： Thomas James Wilson ,  Minh-Dieu Thi Vu ,  Yutaka Hori

IPC: G05B19/18

CPC classification number: G06F3/0416

Abstract: A computer system having two or more controllers operating in a Master/Slave configuration is disclosed. In one embodiment, the computer system includes: a sensor panel having a first portion for generating a first set of sense signals indicative of a touch or no-touch condition on the first portion, and a second portion for generating a second set of sense signals indicative of a touch or no-touch condition on the second portion; a first device for receiving and processing the first set of output signals from the first portion of the panel; and a second device for receiving and processing the second set of output signals from the second portion of the panel, wherein the first and second devices operate cooperatively in a Master/Slave configuration.

Abstract translation: 公开了一种具有以主/从配置工作的两个或多个控制器的计算机系统。 在一个实施例中，计算机系统包括：传感器面板，其具有第一部分，用于产生指示第一部分上的触摸或无触摸状态的第一组感测信号;以及第二部分，用于产生第二组感测信号 指示第二部分上的触摸或不触摸状态; 第一装置，用于从面板的第一部分接收和处理第一组输出信号; 以及用于从所述面板的第二部分接收和处理所述第二组输出信号的第二装置，其中所述第一和第二装置以主/从配置协作地进行操作。

公开(公告)号：US20090063736A1

公开(公告)日：2009-03-05

申请号：US11947723

申请日：2007-11-29

Applicant: Thomas James Wilson ,  Yutaka Hori

Inventor： Thomas James Wilson ,  Yutaka Hori

IPC: G06F1/12

CPC classification number: G06F13/4291 ,  G06F5/10 ,  Y02D10/14 ,  Y02D10/151

Abstract: This relates to interface circuits for synchronous protocols which do not rely on a dedicated high frequency clock signal. Instead, the interface circuit may rely on a clock signal received over the interface from another device in order to transfer data between the interface and an internal buffer. Furthermore, the interface circuits can rely on a clock signal provided by a bus for a device the interface circuit is located in to transfer data between the internal buffer and the bus. The internal buffer can be, but is not limited to a FIFO. Alternatively, it can be a stack or another data structure. The internal buffer can be configured so that each of its multiple of cells is a shift register. Thus, a preparatory step of moving a byte of data from the buffer to a separate shift register can be avoided.

Abstract translation: 这涉及不依赖于专用高频时钟信号的同步协议的接口电路。 相反，接口电路可以依赖于通过来自另一设备的接口接收的时钟信号，以便在接口和内部缓冲器之间传送数据。 此外，接口电路可以依靠总线提供的用于接口电路所在设备的时钟信号，以在内部缓冲器和总线之间传输数据。 内部缓冲器可以是但不限于FIFO。 或者，它可以是堆栈或其他数据结构。 可以配置内部缓冲器，使得其多个单元格中的每一个都是移位寄存器。 因此，可以避免将数据从缓冲器移动到单独的移位寄存器的准备步骤。

公开(公告)号：US08310472B2

公开(公告)日：2012-11-13

申请号：US12726107

申请日：2010-03-17

Applicant: Minh-Dieu Thi Vu ,  Thomas James Wilson ,  Christoph Horst Krah

Inventor： Minh-Dieu Thi Vu ,  Thomas James Wilson ,  Christoph Horst Krah

IPC: G06F3/038

CPC classification number: G06F3/0416 ,  G06F1/3262 ,  G06F3/03545 ,  G06F3/041 ,  G06F3/044 ,  G06F2203/04104

Abstract: A device that can autonomously scan a sensor panel is disclosed. Autonomous scanning can be performed by implementing channel scan logic. In one embodiment, channel scan logic carries out many of the functions that a processor would normally undertake, including generating timing sequences and obtaining result data; comparing scan result data against a threshold value (e.g., in an auto-scan mode); generating row count; selecting one or more scanning frequency bands; power management control; and performing an auto-scan routine in a low power mode.

公开(公告)号：US20120056662A1

公开(公告)日：2012-03-08

申请号：US12877056

申请日：2010-09-07

Applicant: Thomas James Wilson ,  Richard James Reeve

Inventor： Thomas James Wilson ,  Richard James Reeve

IPC: H03K17/96

CPC classification number: G06F1/12 ,  G06F3/0412 ,  G06F3/0416

Abstract: Touch sensing can be accomplished using master/slave touch controllers that transmit drive signals to a touch surface and process sense signals including superpositions resulting from master/slave drive signals. The master/slave can drive and sense different sets of lines, respectively, of the touch surface. A communication link between master/slave can be established by transmitting a clock signal between master/slave, transmitting a command including sequence information to the slave, and initiating a communication sequence from the clock signal and sequence information. The slave can receive/transmit communications from/to the master during first/second portions of the communication sequence, respectively. Touch sensing operations can be synchronized between master/slave by transmitting a command including phase alignment information from master to slave, and generating slave clock signals based on the clock signal and the phase alignment information, such that sense signal processing by master clock signals are in-phase with sense signal processing by slave clock signals.

Abstract translation: 可以使用将驱动信号传输到触摸表面的主/从触摸控制器来实现触摸感测，并且处理由主/从驱动信号引起的叠加的感测信号。 主/从机可以分别驱动和感测触摸面的不同的线组。 主/从机之间的通信链路可以通过在主机/从机之间发送时钟信号，向从机发送包括序列信息的命令，以及从时钟信号和序列信息发起通信序列来建立。 从机可以在通信序列的第一/第二部分分别接收/发送与主机的通信。 通过发送包括从主机到从机的相位对准信息的命令，以及基于时钟信号和相位对准信息产生从时钟信号，可以在主/从机之间同步触摸感测操作，使得主时钟信号的感测信号处理 通过从时钟信号进行感测信号处理。

公开(公告)号：US20120019467A1

公开(公告)日：2012-01-26

申请号：US13250984

申请日：2011-09-30

Applicant: Steve Porter HOTELLING ,  Christoph Horst Krah ,  Marduke Yousefpor ,  Thomas James Wilson

Inventor： Steve Porter HOTELLING ,  Christoph Horst Krah ,  Marduke Yousefpor ,  Thomas James Wilson

IPC: G06F3/041

CPC classification number: G06F3/0416 ,  G06F3/044 ,  G06F2203/04104 ,  G09G5/18

Abstract: A multi-stimulus controller for a multi-touch sensor is formed on a single integrated circuit (single-chip). The multi-stimulus controller includes a transmit oscillator, a transmit signal section that generates a plurality of drive signals based on a frequency of the transmit oscillator, a plurality of transmit channels that transmit the drive signals simultaneously to drive the multi-touch sensor, a receive channel that receives a sense signal resulting from the driving of the multi-touch sensor, a receive oscillator, and a demodulation section that demodulates the received sense signal based on a frequency of the receive oscillator to obtain sensing results, the demodulation section including a demodulator and a vector operator.

Abstract translation: 用于多触摸传感器的多激励控制器形成在单个集成电路（单芯片）上。 多激励控制器包括发射振荡器，基于发射振荡器的频率产生多个驱动信号的发射信号部分，同时传输驱动信号以驱动多点触摸传感器的多个发射信道， 接收信号，其接收由所述多点触摸传感器的驱动产生的感测信号，接收振荡器和解调部分，所述解调部分基于所述接收振荡器的频率来解调所接收的感测信号以获得感测结果，所述解调部分包括： 解调器和向量运算符。

公开(公告)号：US08094128B2

公开(公告)日：2012-01-10

申请号：US11650201

申请日：2007-01-03

Applicant: Minh-Dieu Thi Vu ,  Thomas James Wilson ,  Christoph Horst Krah

Inventor： Minh-Dieu Thi Vu ,  Thomas James Wilson ,  Christoph Horst Krah

IPC: G06F3/041

CPC classification number: G06F3/0416 ,  G06F1/3262 ,  G06F3/03545 ,  G06F3/041 ,  G06F3/044 ,  G06F2203/04104

Abstract: A device that can autonomously scan a sensor panel is disclosed. Autonomous scanning can be performed by implementing channel scan logic. In one embodiment, channel scan logic carries out many of the functions that a processor would normally undertake, including generating timing sequences and obtaining result data; comparing scan result data against a threshold value (e.g., in an auto-scan mode); generating row count; selecting one or more scanning frequency bands; power management control; and performing an auto-scan routine in a low power mode.

Abstract translation: 公开了一种可自主扫描传感器面板的装置。 可以通过实现信道扫描逻辑来执行自主扫描。 在一个实施例中，信道扫描逻辑执行处理器通常将承担的许多功能，包括产生定时序列和获得结果数据; 将扫描结果数据与阈值进行比较（例如，以自动扫描模式）; 生成行数; 选择一个或多个扫描频带; 电源管理控制; 并以低功率模式执行自动扫描程序。