公开(公告)号：US20210280688A1

公开(公告)日：2021-09-09

申请号：US17328674

申请日：2021-05-24

Applicant: Tessera, Inc.

Inventor： Kangguo Cheng ,  Juntao LI ,  Heng Wu ,  Peng Xu

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/40 ,  H01L29/78 ,  H01L21/311 ,  H01L29/423 ,  H01L23/31 ,  H01L23/29 ,  H01L21/02 ,  H01L29/786 ,  H01L29/775 ,  B82Y10/00

Abstract: Inner and outer spacers for nanosheet transistors are formed using techniques that improve junction uniformity. One nanosheet transistor device includes outer spacers and an interlevel dielectric layer liner made from the same material. A second nanosheet transistor device includes outer spacers, inner spacers and an interlevel dielectric layer liner that are all made from the same material.

公开(公告)号：US11049953B2

公开(公告)日：2021-06-29

申请号：US16939415

申请日：2020-07-27

Applicant: Tessera, Inc.

Inventor： Kangguo Cheng ,  Juntao Li ,  Heng Wu ,  Peng Xu

IPC: H01L29/00 ,  H01L29/66 ,  H01L29/06 ,  H01L29/40 ,  H01L29/78 ,  H01L21/311 ,  H01L29/423 ,  H01L23/31 ,  H01L23/29 ,  H01L21/02 ,  H01L29/786 ,  H01L29/775 ,  B82Y10/00

Abstract: Inner and outer spacers for nanosheet transistors are formed using techniques that improve junction uniformity. One nanosheet transistor device includes outer spacers and an interlevel dielectric layer liner made from the same material. A second nanosheet transistor device includes outer spacers, inner spacers and an interlevel dielectric layer liner that are all made from the same material.

公开(公告)号：US10727315B2

公开(公告)日：2020-07-28

申请号：US16252663

申请日：2019-01-20

Applicant: TESSERA, INC.

Inventor： Kangguo Cheng ,  Juntao Li ,  Heng Wu ,  Peng Xu

IPC: H01L29/00 ,  H01L29/66 ,  H01L29/06 ,  H01L29/40 ,  H01L29/78 ,  H01L21/311 ,  H01L29/423 ,  H01L23/31 ,  H01L23/29 ,  H01L21/02 ,  H01L29/786 ,  H01L29/775 ,  B82Y10/00

Abstract: Inner and outer spacers for nanosheet transistors are formed using techniques that improve junction uniformity. One nanosheet transistor device includes outer spacers and an interlevel dielectric layer liner made from the same material. A second nanosheet transistor device includes outer spacers, inner spacers and an interlevel dielectric layer liner that are all made from the same material.

公开(公告)号：US11342230B2

公开(公告)日：2022-05-24

申请号：US16505063

申请日：2019-07-08

Applicant: TESSERA, INC.

Inventor： Kangguo Cheng ,  Choonghyun Lee ,  Juntao Li ,  Heng Wu ,  Peng Xu

IPC: H01L21/8234 ,  H01L21/311 ,  H01L27/088 ,  H01L29/06 ,  H01L21/762 ,  H01L29/78 ,  H01L29/66 ,  H01L21/02 ,  H01L21/3115

Abstract: In accordance with an embodiment of the present invention, a method of forming a densified fill layer is provided. The method includes forming a pair of adjacent vertical fins on a substrate, forming an inner liner on the sidewalls of the adjacent vertical fins, and forming a sacrificial layer on the inner liner. The method further includes forming a fill layer between the pair of adjacent vertical fins, wherein the fill layer is in contact with at least a portion of the sacrificial layer, removing at least a portion of the sacrificial layer in contact with the fill layer to form sidewall channels adjacent to the fill layer, and subjecting the fill layer to a densification process to form the densified fill layer.