摘要:
An LC resonant circuit of an oscillator includes a parallel circuit of an inductor, a first fine adjustable capacitor and a first capacitor bank, and a series circuit of a second fine adjustable capacitor and a second capacitor bank. A frequency conversion gain of the oscillator is the sum of a frequency conversion gain of the oscillator based upon the first fine adjustable capacitor which decreases according to increase of a capacitance value of the capacitor bank and a frequency conversion gain based upon the second fine adjustable capacitor which increases according to increase of a capacitance value of the second capacitor bank. Accordingly, an LC resonant circuit for an oscillator with reduced fluctuation of a frequency conversion gain, and an oscillator and a data processing equipment using the same are provided.
摘要:
An LC resonant circuit of an oscillator includes a parallel circuit of an inductor, a first fine adjustable capacitor and a first capacitor bank, and a series circuit of a second fine adjustable capacitor and a second capacitor bank. A frequency conversion gain of the oscillator is the sum of a frequency conversion gain of the oscillator based upon the first fine adjustable capacitor which decreases according to increase of a capacitance value of the capacitor bank and a frequency conversion gain based upon the second fine adjustable capacitor which increases according to increase of a capacitance value of the second capacitor bank. Accordingly, an LC resonant circuit for an oscillator with reduced fluctuation of a frequency conversion gain, and an oscillator and a data processing equipment using the same are provided.
摘要:
Variable operating currents are generated in relation to input signal power and output signal power and achieving both low noise and low power consumption. Emitter follower circuits are attached to output terminals of a frequency divider for generating a local signal. By adjusting the currents flowing through the emitter follower circuits, the amounts of currents flowing into mixers is adjusted. When the amounts of currents of local signals flowing into the mixers increases, the effect of noise suppression is expected. The amounts of the currents flowing through the emitter follower circuits is changed depending on the amplification factor of variable amplifiers.
摘要:
The present invention provides a semiconductor integrated circuit capable of reducing a chip occupied area and reducing variations in control gain of a digitally controlled oscillator. The semiconductor integrated circuit is equipped with the digitally controlled oscillator. The digitally controlled oscillator comprises oscillation transistors and a resonant circuit. The resonant circuit comprises inductances, a frequency coarse-tuning variable capacitor array and a frequency fine-tuning variable capacitor array. The frequency coarse-tuning variable capacitor array comprises a plurality of coarse-tuning capacitor unit cells. The frequency fine-tuning variable capacitor array comprises a plurality of fine-tuning capacitor unit cells. The capacitance values of the coarse-tuning capacitor unit cells of the frequency coarse-tuning variable capacitor array are set in accordance with a binary weight 2M−1. The capacitance values of the fine-tuning capacitor unit cells of the frequency fine-tuning variable capacitor array are also set in accordance with a binary weight 2N−1.
摘要:
An oscillation circuit formed in a single semiconductor chip, wherein a first source voltage is supplied to a first power supply terminal, a second source voltage different from the first source voltage is supplied to a second power supply terminal, a voltage regulator receives the voltage from the first power supply terminal and outputs a source voltage, a voltage controlled oscillation circuit is supplied with a source voltage from the voltage regulator, a current source circuit is connected to the second power supply terminal, the voltage regulator, the voltage controlled oscillation circuit and the current source circuit are inserted in series between the first and second power supply terminals, and the current supplied to the voltage controlled oscillation circuit from the voltage regulator flows in the current source circuit.
摘要:
A voltage controlled LC resonance oscillation circuit has a plurality of capacitive elements connected to an output node. These capacitive elements are applied with voltages at opposing terminals for selecting an oscillating frequency band, so that the oscillating frequency band can be changed step by step in accordance with the selection voltage. The capacitive elements include at least one variable capacitive element such as a MOS capacitor, the capacitance of which is varied in accordance with a voltage applied thereto. The MOS capacitor is similar in structure to a MOS transistor. The variable capacitive element can be supplied at a terminal opposite to the output node with a voltage from a variable voltage source, for example, in place of the selection voltage. The voltage controlled LC resonance oscillation circuit can measure the output amplitude and oscillating frequency without affecting the characteristics thereof, and reduce the parasitic capacitance.
摘要:
The present invention provides ABS precision improving means under ADPLL environment or environment close to the ADPLL environment and realizes shortening of process time of the ABS. In a digital frequency comparator in an ABS circuit, a DFF for storing an initial phase difference in a DPE signal output from a DPFD is prepared. Immediately after start of ABS operation, a DPE signal output from the DPFD is recorded as a signal expressing an initial phase difference in an internal circuit of the DPFD into the DFF. After that, the digital frequency comparator performs ABS by using a signal obtained by subtracting the initial phase error recorded in the DFF from an input DPE signal, thereby realizing high-speed and stabilized ABS operation.
摘要:
An oscillation circuit formed in a single semiconductor chip, wherein a first source voltage is supplied to a first power supply terminal, a second source voltage different from the first source voltage is supplied to a second power supply terminal, a voltage regulator receives the voltage from the first power supply terminal and outputs a source voltage, a voltage controlled oscillation circuit is supplied with a source voltage from the voltage regulator, a current source circuit is connected to the second power supply terminal, the voltage regulator, the voltage controlled oscillation circuit and the current source circuit are inserted in series between the first and second power supply terminals, and the current supplied to the voltage controlled oscillation circuit from the voltage regulator flows in the current source circuit.
摘要:
The present invention provides ABS precision improving means under ADPLL environment or environment close to the ADPLL environment and realizes shortening of process time of the ABS. In a digital frequency comparator in an ABS circuit, a DFF for storing an initial phase difference in a DPE signal output from a DPFD is prepared. Immediately after start of ABS operation, a DPE signal output from the DPFD is recorded as a signal expressing an initial phase difference in an internal circuit of the DPFD into the DFF. After that, the digital frequency comparator performs ABS by using a signal obtained by subtracting the initial phase error recorded in the DFF from an input DPE signal, thereby realizing high-speed and stabilized ABS operation.
摘要:
The present invention provides ABS precision improving means under ADPLL environment or environment close to the ADPLL environment and realizes shortening of process time of the ABS. In a digital frequency comparator in an ABS circuit, a DFF for storing an initial phase difference in a DPE signal output from a DPFD is prepared. Immediately after start of ABS operation, a DPE signal output from the DPFD is recorded as a signal expressing an initial phase difference in an internal circuit of the DPFD into the DFF. After that, the digital frequency comparator performs ABS by using a signal obtained by subtracting the initial phase error recorded in the DFF from an input DPE signal, thereby realizing high-speed and stabilized ABS operation.