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1.发明申请Oscillator and data processing equipment using the same and voltage control oscillator and data processing equipment using voltage control oscillator 失效振荡器和数据处理设备使用相同的压控振荡器和数据处理设备使用压控振荡器公开(公告)号：US20070103248A1
公开(公告)日：2007-05-10
申请号：US11594102
申请日：2006-11-08
IPC分类号： H03B5/08
CPC分类号： H03J3/20 , H03B5/1215 , H03B5/1218 , H03B5/1228 , H03B5/1231 , H03B5/1243 , H03B5/1253 , H03B5/1265 , H03B5/1293 , H03B5/1296 , H03B2201/0208 , H03B2201/0216 , H03D3/007 , H03J2200/10
摘要： An LC resonant circuit of an oscillator includes a parallel circuit of an inductor, a first fine adjustable capacitor and a first capacitor bank, and a series circuit of a second fine adjustable capacitor and a second capacitor bank. A frequency conversion gain of the oscillator is the sum of a frequency conversion gain of the oscillator based upon the first fine adjustable capacitor which decreases according to increase of a capacitance value of the capacitor bank and a frequency conversion gain based upon the second fine adjustable capacitor which increases according to increase of a capacitance value of the second capacitor bank. Accordingly, an LC resonant circuit for an oscillator with reduced fluctuation of a frequency conversion gain, and an oscillator and a data processing equipment using the same are provided.
摘要翻译： 振荡器的LC谐振电路包括电感器的并联电路，第一微调可调电容器和第一电容器组，以及第二精细可调电容器和第二电容器组的串联电路。 振荡器的变频增益是基于根据电容器组的电容值的增加而减小的第一微调电容器的振荡器的频率转换增益和基于第二微调电容器的频率转换增益的和 其根据第二电容器组的电容值的增加而增加。 因此，提供了一种用于具有降低的变频增益波动的振荡器的LC谐振电路，以及使用其的振荡器和数据处理设备。
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2.发明授权Oscillator and data processing equipment using the same and voltage control oscillator and data processing equipment using voltage control oscillator 失效振荡器和数据处理设备使用相同的压控振荡器和数据处理设备使用压控振荡器公开(公告)号：US07518458B2
公开(公告)日：2009-04-14
申请号：US11594102
申请日：2006-11-08
IPC分类号： H03B5/08
CPC分类号： H03J3/20 , H03B5/1215 , H03B5/1218 , H03B5/1228 , H03B5/1231 , H03B5/1243 , H03B5/1253 , H03B5/1265 , H03B5/1293 , H03B5/1296 , H03B2201/0208 , H03B2201/0216 , H03D3/007 , H03J2200/10
摘要： An LC resonant circuit of an oscillator includes a parallel circuit of an inductor, a first fine adjustable capacitor and a first capacitor bank, and a series circuit of a second fine adjustable capacitor and a second capacitor bank. A frequency conversion gain of the oscillator is the sum of a frequency conversion gain of the oscillator based upon the first fine adjustable capacitor which decreases according to increase of a capacitance value of the capacitor bank and a frequency conversion gain based upon the second fine adjustable capacitor which increases according to increase of a capacitance value of the second capacitor bank. Accordingly, an LC resonant circuit for an oscillator with reduced fluctuation of a frequency conversion gain, and an oscillator and a data processing equipment using the same are provided.
摘要翻译： 振荡器的LC谐振电路包括电感器的并联电路，第一微调可调电容器和第一电容器组，以及第二精细可调电容器和第二电容器组的串联电路。 振荡器的变频增益是基于根据电容器组的电容值的增加而减小的第一微调电容器的振荡器的变频增益和基于第二微调电容器的频率转换增益的和 其根据第二电容器组的电容值的增加而增加。 因此，提供了一种用于具有降低的变频增益波动的振荡器的LC谐振电路，以及使用其的振荡器和数据处理设备。
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公开(公告)号：US07642618B2
公开(公告)日：2010-01-05
申请号：US11183800
申请日：2005-07-19
CPC分类号： H01L23/5227 , H01F17/0006 , H01L2924/0002 , H01L2924/3011 , H03B5/1215 , H03B5/1228 , H03B5/1243 , H03B5/1271 , H01L2924/00
摘要： Semiconductor devices are provided with high performance high-frequency circuits in which interference caused by inductors is reduced. In a semiconductor device including a modulator circuit to modulate a carrier wave by a base band signal to output an RF signal and a demodulator circuit to demodulate the RF signal by use of the carrier wave to gain the base band signal and a local oscillator to generate the carrier wave, inductors respectively having a closed loop wire are adopted. Interference caused by mutual inductance is reduced by the closed loop wire. For example, where inductors are adopted in the modulator circuit, a closed loop wire is disposed around the outer periphery of the inductors.
摘要翻译： 半导体器件设置有由电感器引起的干扰减小的高性能高频电路。 在包括通过基带信号调制载波以调制RF信号的调制器电路以及解调器电路的半导体器件中，通过使用载波来解调RF信号以获得基带信号和本地振荡器以产生 采用载波，分别具有闭环线的电感器。 通过闭环线减少互感造成的干扰。 例如，在调制器电路中采用电感器的情况下，围绕电感器的外周设置闭环线。
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公开(公告)号：US20060038621A1
公开(公告)日：2006-02-23
申请号：US11183800
申请日：2005-07-19
IPC分类号： H03J7/02
CPC分类号： H01L23/5227 , H01F17/0006 , H01L2924/0002 , H01L2924/3011 , H03B5/1215 , H03B5/1228 , H03B5/1243 , H03B5/1271 , H01L2924/00
摘要： Semiconductor devices provided with high performance high-frequency circuits that reduce interference caused by inductors are provided. In the semiconductor device including a modulator circuit to modulate a carrier wave by a base band signal to output an RF signal and a demodulator circuit to demodulate the RF signal by use of the carrier wave to gain the base band signal and a local oscillator to generate the carrier wave, inductors respectively having a closed loop wire are adopted. Interference caused by mutual inductance is reduced by the closed loop wire. For example, where inductors are adopted in the modulator circuit, a closed loop wire is disposed around the outer periphery of the inductors.
摘要翻译： 提供了具有降低由电感器引起的干扰的高性能高频电路的半导体器件。 在包括通过基带信号调制载波以调制RF信号的调制器电路和解调器电路的半导体器件中，通过使用载波来解调RF信号以获得基带信号和本地振荡器以产生 采用载波，分别具有闭环线的电感器。 通过闭环线减少互感造成的干扰。 例如，在调制器电路中采用电感器的情况下，围绕电感器的外周设置闭环线。
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公开(公告)号：US20060261902A1
公开(公告)日：2006-11-23
申请号：US11435757
申请日：2006-05-18
申请人： Toru Masuda , Hiroshi Mori
发明人： Toru Masuda , Hiroshi Mori
IPC分类号： H03B5/12
CPC分类号： H03B5/1231 , H03B5/1215 , H03B5/1243 , H03B5/1265 , H03B2201/0208 , H03J2200/10
摘要： The capacitance of the capacitor with the constant capacitance is equivalently reduced in the capacitance of a resonant capacitor in a voltage control oscillator to increase the variable amount of the capacitance of the resonant capacitor, and to expand an oscillation frequency range. There are provided a differential negative conductance generator circuit having two resonation nodes for differential output, a differential resonant circuit having a variable capacitance that is controlled by voltage control and an inductance connected in parallel to each other, and a differential negative impedance circuit. A resonant circuit and a negative impedance circuit are connected between the resonation nodes. The capacitor with the constant capacitance that occurs between the resonation nodes is reduced by the negative impedance of the negative impedance circuit. The capacitor with the constant capacitance is represented by floating capacitors that occur between one of the resonation nodes and a ground potential and between the other resonation node and the ground potential, respectively.
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公开(公告)号：US07843287B2
公开(公告)日：2010-11-30
申请号：US12127782
申请日：2008-05-27
申请人： Toru Masuda , Hiroshi Mori
发明人： Toru Masuda , Hiroshi Mori
CPC分类号： H03H11/42 , H03H11/1291
摘要： The present invention is directed to provide a low-power-consumption wide-range RF signal processing unit having a small chip occupation area. A semiconductor integrated circuit has, on a semiconductor chip, a resonant circuit including a first capacitor having a capacitance which can be controlled by a first control signal of a first control terminal, and a gyrator for equivalently emulating an inductor by including a second capacitor having a capacitance which can be controlled by a second control signal of a second control terminal. The capacitance and the inductor form a parallel resonant circuit. At the time of changing parallel resonant frequency, the capacitances of the first and second capacitors are coordinately changed. The parallel resonant circuit is suitable for an active load which is connected to an output node of an amplifier.
摘要翻译： 本发明旨在提供一种具有小芯片占用面积的低功耗宽范围RF信号处理单元。 半导体集成电路在半导体芯片上具有谐振电路，该谐振电路包括具有可由第一控制端子的第一控制信号控制的电容的第一电容器和用于等效地仿真电感器的回转器，该回转器包括：第二电容器， 可以由第二控制端子的第二控制信号控制的电容。 电容和电感器形成并联谐振电路。 在改变并联谐振频率时，第一和第二电容器的电容被协调地改变。 并联谐振电路适用于连接到放大器的输出节点的有功负载。
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公开(公告)号：US07589596B2
公开(公告)日：2009-09-15
申请号：US11435757
申请日：2006-05-18
申请人： Toru Masuda , Hiroshi Mori
发明人： Toru Masuda , Hiroshi Mori
IPC分类号： H03B5/12
CPC分类号： H03B5/1231 , H03B5/1215 , H03B5/1243 , H03B5/1265 , H03B2201/0208 , H03J2200/10
摘要： The capacitance of the capacitor with the constant capacitance is equivalently reduced in the capacitance of a resonant capacitor in a voltage control oscillator to increase the variable amount of the capacitance of the resonant capacitor, and to expand an oscillation frequency range. There are provided a differential negative conductance generator circuit having two resonation nodes for differential output, a differential resonant circuit having a variable capacitance that is controlled by voltage control and an inductance connected in parallel to each other, and a differential negative impedance circuit. A resonant circuit and a negative impedance circuit are connected between the resonation nodes. The capacitor with the constant capacitance that occurs between the resonation nodes is reduced by the negative impedance of the negative impedance circuit. The capacitor with the constant capacitance is represented by floating capacitors that occur between one of the resonation nodes and a ground potential and between the other resonation node and the ground potential, respectively.
摘要翻译： 具有恒定电容的电容器的电容在电压控制振荡器中的谐振电容器的电容中相当地减小，以增加谐振电容器的电容的可变量，并且扩大振荡频率范围。 提供了具有用于差分输出的两个谐振节点的差分负电导发生器电路，具有由电压控制的可变电容和彼此并联连接的电感的差分谐振电路和差分负阻抗电路。 谐振电路和负阻抗电路连接在谐振节点之间。 具有在谐振节点之间发生的恒定电容的电容器被负阻抗电路的负阻抗减小。 具有恒定电容的电容器分别由发生在谐振节点之一和接地电位之间以及另一个谐振节点与地电位之间的浮动电容器表示。
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公开(公告)号：US20090033440A1
公开(公告)日：2009-02-05
申请号：US12127782
申请日：2008-05-27
申请人： Toru MASUDA , Hiroshi Mori
发明人： Toru MASUDA , Hiroshi Mori
IPC分类号： H03H11/00
CPC分类号： H03H11/42 , H03H11/1291
摘要： The present invention is directed to provide a low-power-consumption wide-range RF signal processing unit having a small chip occupation area. A semiconductor integrated circuit has, on a semiconductor chip, a resonant circuit including a first capacitor having a capacitance which can be controlled by a first control signal of a first control terminal, and a gyrator for equivalently emulating an inductor by including a second capacitor having a capacitance which can be controlled by a second control signal of a second control terminal. The capacitance and the inductor form a parallel resonant circuit. At the time of changing parallel resonant frequency, the capacitances of the first and second capacitors are coordinately changed. The parallel resonant circuit is suitable for an active load which is connected to an output node of an amplifier.
摘要翻译： 本发明旨在提供一种具有小芯片占用面积的低功耗宽范围RF信号处理单元。 半导体集成电路在半导体芯片上具有谐振电路，该谐振电路包括具有可由第一控制端子的第一控制信号控制的电容的第一电容器和用于等效地仿真电感器的回转器，该回转器包括：第二电容器， 可以由第二控制端子的第二控制信号控制的电容。 电容和电感器形成并联谐振电路。 在改变并联谐振频率时，第一和第二电容器的电容被协调地改变。 并联谐振电路适用于连接到放大器的输出节点的有功负载。
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9.发明授权Method of generating combined look-up table, and image processing apparatus and image forming apparatus 有权组合查询表的生成方法以及图像处理装置和图像形成装置公开(公告)号：US08553278B2
公开(公告)日：2013-10-08
申请号：US11947199
申请日：2007-11-29
申请人： Hiroshi Mori
发明人： Hiroshi Mori
CPC分类号： H04N1/6019 , H04N1/603
摘要： An information processing apparatus generates a combined LUT that performs color matching and color separation in an integrated manner, based on an LUT for color matching and an LUT for color separation. Input points of the combined LUT are set such that output corresponding to the input points of the combined LUT corresponds to input points of the LUT for color separation.
摘要翻译： 信息处理装置基于用于颜色匹配的LUT和用于分色的LUT，以集成的方式生成执行颜色匹配和颜色分离的组合LUT。 组合LUT的输入点被设置为使得与组合LUT的输入点相对应的输出对应于用于颜色分离的LUT的输入点。
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公开(公告)号：US08351086B2
公开(公告)日：2013-01-08
申请号：US12137289
申请日：2008-06-11
申请人： Hiroshi Mori
发明人： Hiroshi Mori
IPC分类号： H04N1/40
CPC分类号： G06K17/00 , G06K15/02 , G06K15/1852
摘要： The present invention provides a printing device optimizing information to be embedded by merging pieces of information of respective pages into a single piece of information in N-up printing. The printing device generates the information to be embedded according to a result of analyzing print parameters in print data when performing embedding printing processing of the information to be embedded for the print data in a machine-recognizable manner. That is, in the printing device, a unit of generating information to be embedded acquires respective pieces of information of M pages (1≦M≦N), analyzes the acquired respective pieces of information to be embedded, and generates a single piece of information to be embedded merging the respective pieces of information to be embedded based on the analysis result of the respective pieces of information to be embedded, when N-up printing is designated.
摘要翻译： 本发明提供一种通过在N-up打印中将各页的信息合并为单个信息来优化待嵌入信息的打印装置。 当以机器可识别的方式对打印数据嵌入的信息进行嵌入打印处理时，打印装置根据打印数据中的打印参数的分析结果生成要嵌入的信息。 也就是说，在打印装置中，生成要嵌入的信息的单元获取M页（1＆nlE; M＆nlE; N）的各条信息，分析所获取的各个要嵌入的信息，并生成单个信息 当指定N-up打印时，基于要嵌入的各个信息段的分析结果嵌入合并要嵌入的各个信息段。
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