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公开(公告)号：US20140217604A1
公开(公告)日：2014-08-07
申请号：US13758665
申请日：2013-02-04
Inventor： Bruce C.S. Chou , Chih-Hsien Lin , Hsiang-Tai Lu , Jung-Kuo Tu , Tung-Hung Hsieh , Chen-Hua Lin , Mingo Liu
CPC classification number: H01L21/56 , H01L21/486 , H01L21/563 , H01L21/76898 , H01L23/147 , H01L23/3135 , H01L23/3185 , H01L23/49811 , H01L23/49827 , H01L23/5389 , H01L24/05 , H01L24/11 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/131 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13184 , H01L2224/16225 , H01L2224/16235 , H01L2224/2101 , H01L2224/214 , H01L2224/215 , H01L2224/2919 , H01L2224/32225 , H01L2224/48091 , H01L2224/73204 , H01L2224/73265 , H01L2224/81193 , H01L2224/81424 , H01L2224/81444 , H01L2224/81447 , H01L2224/81815 , H01L2224/81895 , H01L2224/82101 , H01L2224/83104 , H01L2224/85 , H01L2225/06513 , H01L2924/00014 , H01L2924/01322 , H01L2924/12042 , H01L2924/1431 , H01L2924/1434 , H01L2924/15192 , H01L2924/1531 , H01L2924/181 , H01L2924/18161 , H01L2924/19107 , H01L2924/00012 , H01L2224/16145 , H01L2224/32145 , H01L2924/014 , H01L2924/01029 , H01L2924/01013 , H01L2924/01047 , H01L2924/01079 , H01L2924/01074 , H01L2924/01028 , H01L2924/00 , H01L2224/45099
Abstract: A semiconductor device includes a first die having a first active surface and a first backside surface opposite the first active surface, a second die having a second active surface and a second backside surface opposite the second active surface, and an interposer, the first active surface of the first die being electrically coupled to a first side of the interposer, the second active surface of the second die being electrically coupled to a second side of the interposer. The semiconductor device also includes a first connector over the interposer, a first encapsulating material surrounding the second die, the first encapsulating material having a first surface over the interposer, and a via electrically coupling the first connector and the interposer. A first end of the via is substantially coplanar with the first surface of the first encapsulating material.
Abstract translation: 半导体器件包括具有第一有源表面和与第一有源表面相对的第一背面的第一管芯，具有第二有源表面和与第二有源表面相对的第二背面的第二管芯，以及插入件，第一有源表面 所述第一管芯电耦合到所述插入件的第一侧，所述第二管芯的所述第二有源表面电连接到所述插入件的第二侧。 半导体器件还包括位于插入器上的第一连接器，围绕第二管芯的第一封装材料，第一封装材料具有位于插入件上的第一表面，以及电连接第一连接器和插入件的通孔。 通孔的第一端与第一封装材料的第一表面基本共面。
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公开(公告)号：US08970023B2
公开(公告)日：2015-03-03
申请号：US13758665
申请日：2013-02-04
Inventor： Bruce C. S. Chou , Chih-Hsien Lin , Hsiang-Tai Lu , Jung-Kuo Tu , Tung-Hung Hsieh , Chen-Hua Lin , Mingo Liu
CPC classification number: H01L21/56 , H01L21/486 , H01L21/563 , H01L21/76898 , H01L23/147 , H01L23/3135 , H01L23/3185 , H01L23/49811 , H01L23/49827 , H01L23/5389 , H01L24/05 , H01L24/11 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/131 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13184 , H01L2224/16225 , H01L2224/16235 , H01L2224/2101 , H01L2224/214 , H01L2224/215 , H01L2224/2919 , H01L2224/32225 , H01L2224/48091 , H01L2224/73204 , H01L2224/73265 , H01L2224/81193 , H01L2224/81424 , H01L2224/81444 , H01L2224/81447 , H01L2224/81815 , H01L2224/81895 , H01L2224/82101 , H01L2224/83104 , H01L2224/85 , H01L2225/06513 , H01L2924/00014 , H01L2924/01322 , H01L2924/12042 , H01L2924/1431 , H01L2924/1434 , H01L2924/15192 , H01L2924/1531 , H01L2924/181 , H01L2924/18161 , H01L2924/19107 , H01L2924/00012 , H01L2224/16145 , H01L2224/32145 , H01L2924/014 , H01L2924/01029 , H01L2924/01013 , H01L2924/01047 , H01L2924/01079 , H01L2924/01074 , H01L2924/01028 , H01L2924/00 , H01L2224/45099
Abstract: A semiconductor device includes a first die having a first active surface and a first backside surface opposite the first active surface, a second die having a second active surface and a second backside surface opposite the second active surface, and an interposer, the first active surface of the first die being electrically coupled to a first side of the interposer, the second active surface of the second die being electrically coupled to a second side of the interposer. The semiconductor device also includes a first connector over the interposer, a first encapsulating material surrounding the second die, the first encapsulating material having a first surface over the interposer, and a via electrically coupling the first connector and the interposer. A first end of the via is substantially coplanar with the first surface of the first encapsulating material.
Abstract translation: 半导体器件包括具有第一有源表面和与第一有源表面相对的第一背面的第一管芯，具有第二有源表面和与第二有源表面相对的第二背面的第二管芯，以及插入件，第一有源表面 所述第一管芯电耦合到所述插入件的第一侧，所述第二管芯的所述第二有源表面电连接到所述插入件的第二侧。 半导体器件还包括位于插入器上的第一连接器，围绕第二管芯的第一封装材料，第一封装材料具有位于插入件上的第一表面，以及电连接第一连接器和插入件的通孔。 通孔的第一端与第一封装材料的第一表面基本共面。
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公开(公告)号：US10269586B2
公开(公告)日：2019-04-23
申请号：US14621567
申请日：2015-02-13
Inventor： Bruce C. S. Chou , Chih-Hsien Lin , Hsiang-Tai Lu , Jung-Kuo Tu , Tung-Hung Hsieh , Chen-Hua Lin , Mingo Liu
IPC: H01L21/56 , H01L23/00 , H01L25/065 , H01L25/00 , H01L23/538 , H01L21/48 , H01L21/768 , H01L23/31 , H01L23/14 , H01L23/498
Abstract: A semiconductor device includes a first die having a first active surface and a first backside surface opposite the first active surface, a second die having a second active surface and a second backside surface opposite the second active surface, and an interposer, the first active surface of the first die being electrically coupled to a first side of the interposer, the second active surface of the second die being electrically coupled to a second side of the interposer. The semiconductor device also includes a first connector over the interposer, a first encapsulating material surrounding the second die, the first encapsulating material having a first surface over the interposer, and a via electrically coupling the first connector and the interposer. A first end of the via is substantially coplanar with the first surface of the first encapsulating material.
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公开(公告)号：US20150162220A1
公开(公告)日：2015-06-11
申请号：US14621567
申请日：2015-02-13
Inventor： Bruce C.S. Chou , Chih-Hsien Lin , Hsiang-Tai Lu , Jung-Kuo Tu , Tung-Hung Hsieh , Chen-Hua Lin , Mingo Liu
IPC: H01L21/56 , H01L23/00 , H01L21/768
CPC classification number: H01L21/56 , H01L21/486 , H01L21/563 , H01L21/76898 , H01L23/147 , H01L23/3135 , H01L23/3185 , H01L23/49811 , H01L23/49827 , H01L23/5389 , H01L24/05 , H01L24/11 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/131 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13184 , H01L2224/16225 , H01L2224/16235 , H01L2224/2101 , H01L2224/214 , H01L2224/215 , H01L2224/2919 , H01L2224/32225 , H01L2224/48091 , H01L2224/73204 , H01L2224/73265 , H01L2224/81193 , H01L2224/81424 , H01L2224/81444 , H01L2224/81447 , H01L2224/81815 , H01L2224/81895 , H01L2224/82101 , H01L2224/83104 , H01L2224/85 , H01L2225/06513 , H01L2924/00014 , H01L2924/01322 , H01L2924/12042 , H01L2924/1431 , H01L2924/1434 , H01L2924/15192 , H01L2924/1531 , H01L2924/181 , H01L2924/18161 , H01L2924/19107 , H01L2924/00012 , H01L2224/16145 , H01L2224/32145 , H01L2924/014 , H01L2924/01029 , H01L2924/01013 , H01L2924/01047 , H01L2924/01079 , H01L2924/01074 , H01L2924/01028 , H01L2924/00 , H01L2224/45099
Abstract: A semiconductor device includes a first die having a first active surface and a first backside surface opposite the first active surface, a second die having a second active surface and a second backside surface opposite the second active surface, and an interposer, the first active surface of the first die being electrically coupled to a first side of the interposer, the second active surface of the second die being electrically coupled to a second side of the interposer. The semiconductor device also includes a first connector over the interposer, a first encapsulating material surrounding the second die, the first encapsulating material having a first surface over the interposer, and a via electrically coupling the first connector and the interposer. A first end of the via is substantially coplanar with the first surface of the first encapsulating material.
Abstract translation: 半导体器件包括具有第一有源表面和与第一有源表面相对的第一背面的第一管芯，具有第二有源表面和与第二有源表面相对的第二背面的第二管芯，以及插入件，第一有源表面 所述第一管芯电耦合到所述插入件的第一侧，所述第二管芯的所述第二有源表面电连接到所述插入件的第二侧。 半导体器件还包括位于插入器上的第一连接器，围绕第二管芯的第一封装材料，第一封装材料具有位于插入件上的第一表面，以及电连接第一连接器和插入件的通孔。 通孔的第一端与第一封装材料的第一表面基本共面。
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