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    Method and Structure for Metal Gates
    3.
    发明申请
    Method and Structure for Metal Gates 有权
    金属门的方法与结构

    公开(公告)号：US20160181163A1

    公开(公告)日：2016-06-23

    申请号：US14579864

    申请日：2014-12-22

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Ju-Li Huang ,  Calvin Chiang ,  Ming-Chia Tai ,  Ming-Hsi Yeh ,  Chao-Cheng Chen

    IPC: H01L21/8238 ,  H01L29/49 ,  H01L29/51 ,  H01L27/092

    CPC classification number: H01L29/4966 ,  H01L21/28088 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823842 ,  H01L21/823857 ,  H01L27/0886 ,  H01L27/092 ,  H01L29/517 ,  H01L29/66545

    Abstract: A semiconductor device having metal gates and methods of forming the same are disclosed. The method includes receiving a substrate, a dummy gate stack formed over the substrate, and a structure surrounding the dummy gate stack. The method further includes removing the dummy gate stack, resulting in a trench in the structure. The method further includes forming a gate dielectric layer in the trench; forming a barrier layer over the gate dielectric layer; forming an oxide layer over the barrier layer; and forming a work function metal layer over the oxide layer. In embodiments, the method further includes removing the work function metal layer by an etchant containing phosphoric acid, wherein the oxide layer prevents the etchant from etching the barrier layer.

    Abstract translation: 公开了一种具有金属栅极的半导体器件及其形成方法。 该方法包括接收衬底，形成在衬底上的虚拟栅极堆叠以及围绕伪栅极堆叠的结构。 该方法还包括去除伪栅极堆叠，从而导致结构中的沟槽。 该方法还包括在沟槽中形成栅极电介质层; 在所述栅极电介质层上形成阻挡层; 在所述阻挡层上形成氧化物层; 以及在所述氧化物层上形成功函数金属层。 在实施例中，该方法还包括通过含有磷酸的蚀刻剂去除功函数金属层，其中氧化物层防止蚀刻剂蚀刻阻挡层。

    METAL GATES FOR SEMICONDUCTOR DEVICES AND METHOD THEREOF
    5.
    发明申请
    METAL GATES FOR SEMICONDUCTOR DEVICES AND METHOD THEREOF 有权

    公开(公告)号：US20240429281A1

    公开(公告)日：2024-12-26

    申请号：US18339596

    申请日：2023-06-22

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Yu-Sheng Chen ,  Ju-Li Huang ,  Shu-Hui Wang ,  Jeng-Ya Yeh

    IPC: H01L29/06 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

    Abstract: A method of manufacturing a semiconductor device includes forming a first stack of nanostructures suspended in a first region, a second stack of nanostructures suspended in a second region, and a third stack of nanostructures suspended in a third region, depositing a first work function (WF) layer wrapping around the nanostructures in the first, second, and third regions, removing the first WF layer from the first and second regions, depositing a second WF layer wrapping around the nanostructures in the first and second regions and over the first WF layer in the third region, removing the second WF layer from the first region, depositing a third WF layer wrapping around the nanostructures in the first region and over the second WF layer in the second and third regions, and forming a capping layer over the third WF layer in the first, second, and third regions.

    Self-Protective Layer Formed on High-K Dielectric Layers with Different Materials
    7.
    发明申请
    Self-Protective Layer Formed on High-K Dielectric Layers with Different Materials 审中-公开

    公开(公告)号：US20190131185A1

    公开(公告)日：2019-05-02

    申请号：US16206668

    申请日：2018-11-30

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Ju-Li Huang ,  Ying-Liang Chuang ,  Ming-Hsi Yeh ,  Kuo-Bin Huang

    IPC: H01L21/8238 ,  H01L21/02 ,  H01L27/092 ,  H01L29/66 ,  H01L29/51 ,  H01L29/49

    Abstract: Semiconductor device structures having metal gate structures with tunable work function values are provided. In one example, a semiconductor device includes a first gate structure and a second gate structure on a substrate; wherein the first gate structure includes a first gate dielectric layer having a first material, and the second gate structure includes a second gate dielectric layer having a second material, the first material being different from the second material, wherein the first and the second gate structures further comprises a first and a second self-protective layers disposed on the first and the second gate dielectric layers respectively, wherein the first self-protective layer comprises metal phosphate and the second self-protective layer comprises boron comprising complex agents and a first work function tuning layer on the first self-protective layer in the first gate structure.

    Method and structure for metal gates
    10.
    发明授权
    Method and structure for metal gates 有权
    金属门的方法和结构

    公开(公告)号：US09431304B2

    公开(公告)日：2016-08-30

    申请号：US14579864

    申请日：2014-12-22

    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

    Inventor： Ju-Li Huang ,  Calvin Chiang ,  Ming-Chia Tai ,  Ming-Hsi Yeh ,  Chao-Cheng Chen

    IPC: H01L21/70 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/49 ,  H01L29/51

    CPC classification number: H01L29/4966 ,  H01L21/28088 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823842 ,  H01L21/823857 ,  H01L27/0886 ,  H01L27/092 ,  H01L29/517 ,  H01L29/66545

    Abstract: A semiconductor device having metal gates and methods of forming the same are disclosed. The method includes receiving a substrate, a dummy gate stack formed over the substrate, and a structure surrounding the dummy gate stack. The method further includes removing the dummy gate stack, resulting in a trench in the structure. The method further includes forming a gate dielectric layer in the trench; forming a barrier layer over the gate dielectric layer; forming an oxide layer over the barrier layer; and forming a work function metal layer over the oxide layer. In embodiments, the method further includes removing the work function metal layer by an etchant containing phosphoric acid, wherein the oxide layer prevents the etchant from etching the barrier layer.

    Abstract translation: 公开了一种具有金属栅极的半导体器件及其形成方法。 该方法包括接收衬底，形成在衬底上的虚拟栅极堆叠以及围绕伪栅极堆叠的结构。 该方法还包括去除伪栅极堆叠，从而导致结构中的沟槽。 该方法还包括在沟槽中形成栅极电介质层; 在所述栅极电介质层上形成阻挡层; 在所述阻挡层上形成氧化物层; 以及在所述氧化物层上形成功函数金属层。 在实施例中，该方法还包括通过含有磷酸的蚀刻剂去除功函数金属层，其中氧化物层防止蚀刻剂蚀刻阻挡层。

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