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公开(公告)号:US20220367549A1
公开(公告)日:2022-11-17
申请号:US17876878
申请日:2022-07-29
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Feng-Chien HSIEH , Yun-Wei CHENG , Wei-Li HU , Kuo-Cheng LEE , Ying-Hao CHEN
IPC: H01L27/146
Abstract: An image sensor device includes a substrate, photosensitive pixels, an interconnect structure, a dielectric layer, and a light blocking element. The photosensitive pixels are in the substrate. The interconnect structure is over a first side of the substrate. The dielectric layer is over a second side of the substrate opposite the first side of the substrate. The light blocking element has a first portion extending over a top surface of the dielectric layer and a second portion extending in the dielectric layer. The second portion of the light blocking element laterally surrounds the photosensitive pixels.
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公开(公告)号:US20220059581A1
公开(公告)日:2022-02-24
申请号:US16998498
申请日:2020-08-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yun-Wei CHENG , Chun-Hao CHOU , Kuo-Cheng LEE , Ying-Hao CHEN
IPC: H01L27/146 , H01L31/028 , H01L31/0216
Abstract: Apparatus and methods for sensing long wavelength light are described herein. A semiconductor device includes: a carrier; a device layer on the carrier; a semiconductor layer on the device layer, and an insulation layer on the semiconductor layer. The semiconductor layer includes isolation regions and pixel regions. The isolation regions are or include a first semiconductor material. The pixel regions are or include a second semiconductor material that is different from the first semiconductor material.
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公开(公告)号:US20210265399A1
公开(公告)日:2021-08-26
申请号:US16937306
申请日:2020-07-23
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Feng-Chien HSIEH , Kuo-Cheng LEE , Ying-Hao CHEN , Yun-Wei CHENG
IPC: H01L27/146
Abstract: An image sensor with stress adjusting layers and a method of fabrication the image sensor are disclosed. The image sensor includes a substrate with a front side surface and a back side surface opposite to the front side surface, an anti-reflective coating (ARC) layer disposed on the back side surface of the substrate, a dielectric layer disposed on the ARC layer, a metal layer disposed on the dielectric layer, and a stress adjusting layer disposed on the metal layer. The stress adjusting layer includes a silicon-rich oxide layer. The concentration profiles of silicon and oxygen atoms in the stress adjusting layer are non-overlapping and different from each other. The image sensor further includes oxide grid structure disposed on the stress adjusting layer.
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公开(公告)号:US20200295188A1
公开(公告)日:2020-09-17
申请号:US16892458
申请日:2020-06-04
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Jung-Chi JENG , I-Chih CHEN , Wen-Chang KUO , Ying-Hao CHEN , Ru-Shang HSIAO , Chih-Mu HUANG
Abstract: A method for forming a semiconductor device is provided. The method includes forming an isolation structure in a semiconductor substrate. The method includes forming a gate over the semiconductor substrate. The method includes forming a support film over the isolation structure. The support film is a continuous film which continuously covers the isolation structure and the gate over the isolation structure, the support film conformally covers a first portion of a top surface and a second portion of a first sidewall of the gate, the top surface faces away from the semiconductor substrate, the support film and a topmost surface of the active region do not overlap with each other, and the topmost surface faces the gate. The method includes after forming the support film, forming lightly doped regions in the semiconductor substrate and at two opposite sides of the gate.
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公开(公告)号:US20180061987A1
公开(公告)日:2018-03-01
申请号:US15804887
申请日:2017-11-06
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
Inventor: I-Chih CHEN , Ying-Lang WANG , Chih-Mu HUANG , Ying-Hao CHEN , Wen-Chang KUO , Jung-Chi JENG
IPC: H01L29/78 , H01L29/66 , H01L29/08 , H01L29/167 , H01L29/165
Abstract: A method of fabricating a semiconductor device includes following steps. A trench is formed in a substrate. A barrier layer and an epitaxy layer are formed in sequence in the trench. The barrier layer has a first dopant. A source/drain recess cavity is formed by etching at least the epitaxial layer. A source/drain region is formed in the source/drain recess cavity. The source/drain region has a second dopant.
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公开(公告)号:US20170338342A1
公开(公告)日:2017-11-23
申请号:US15670978
申请日:2017-08-07
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Jung-Chi JENG , I-Chih CHEN , Wen-Chang KUO , Ying-Hao CHEN , Ru-Shang HSIAO , Chih-Mu HUANG
CPC classification number: H01L29/7833 , H01L29/0649 , H01L29/6659
Abstract: A method for forming a semiconductor device is provided. The method includes forming an isolation structure in a semiconductor substrate, and the isolation structure surrounds an active region of the semiconductor substrate. The method also includes forming a gate over the semiconductor substrate, and the gate is across the active region and extends onto the isolation structure. The gate has an intermediate portion over the active region and two end portions connected to the intermediate portion, the end portions are over the isolation structure. The method includes forming a support film over the isolation structure, and the support film is a continuous film which continuously covers the isolation structure and at least one end portion of the gate.
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公开(公告)号:US20150129940A1
公开(公告)日:2015-05-14
申请号:US14080368
申请日:2013-11-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Jung-Chi JENG , I-Chih CHEN , Wen-Chang KUO , Ying-Hao CHEN , Ru-Shang HSIAO , Chih-Mu HUANG
IPC: H01L29/49 , H01L21/3213 , H01L29/06
CPC classification number: H01L21/32135 , H01L21/28035 , H01L21/28123 , H01L21/32137 , H01L21/32139 , H01L21/8238 , H01L27/085 , H01L27/088 , H01L29/4238 , H01L29/49 , H01L29/4916 , H01L29/6659
Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate. The semiconductor device also includes an isolation structure in the semiconductor substrate and surrounding an active region of the semiconductor substrate. The semiconductor device includes a gate over the semiconductor substrate. The gate has an intermediate portion over the active region and two end portions connected to the intermediate portion. Each of the end portions has a first gate length longer than a second gate length of the intermediate portion and is located over the isolation structure.
Abstract translation: 提供了用于形成半导体器件的机构的实施例。 半导体器件包括半导体衬底。 半导体器件还包括半导体衬底中的隔离结构并且围绕半导体衬底的有源区。 半导体器件包括半导体衬底上的栅极。 该栅极具有在有源区上方的中间部分和与该中间部分连接的两个端部。 每个端部具有长于中间部分的第二栅极长度的第一栅极长度并且位于隔离结构上方。
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公开(公告)号:US20210225916A1
公开(公告)日:2021-07-22
申请号:US17010717
申请日:2020-09-02
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Feng-Chien HSIEH , Yun-Wei CHENG , Wei-Li HU , Kuo-Cheng LEE , Ying-Hao CHEN
IPC: H01L27/146
Abstract: A method for fabricating an image sensor device is provided. The method includes forming a plurality of photosensitive pixels in a substrate; depositing a dielectric layer over the substrate; etching the dielectric layer, resulting in a first trench in the dielectric layer and laterally surrounding the photosensitive pixels; and forming a light blocking structure in the first trench, such that the light blocking structure laterally surrounds the photosensitive pixels.
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公开(公告)号:US20210082784A1
公开(公告)日:2021-03-18
申请号:US17107312
申请日:2020-11-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yun-Wei CHENG , Chun-Hao CHOU , Kuo-Cheng LEE , Ying-Hao CHEN
IPC: H01L23/367 , H01L23/48 , H01L25/065
Abstract: The present disclosure describes heat dissipation structures formed in functional or non-functional areas of a three-dimensional chip structure. These heat dissipation structures are configured to route the heat generated within the three-dimensional chip structure to designated areas on or outside the three-dimensional chip structure. For example, the three-dimensional chip structure can include a plurality of chips vertically stacked on a substrate, a first passivation layer interposed between a first chip and a second chip of the plurality of chips, and a heat dissipation layer embedded in the first passivation layer and configured to allow conductive structures to pass through.
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公开(公告)号:US20210020671A1
公开(公告)日:2021-01-21
申请号:US16512834
申请日:2019-07-16
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Yun-Wei CHENG , Chun-Hao CHOU , Kuo-Cheng LEE , Ying-Hao CHEN
IPC: H01L27/146
Abstract: A back side illumination (BSI) image sensor is provided. The BSI image sensor includes a semiconductor substrate, a first dielectric layer, a reflective element, a second dielectric layer and a color filter layer. The semiconductor substrate has a front side and a back side. The first dielectric layer is disposed on the front side of the semiconductor substrate. The reflective element is disposed on the first dielectric layer, in which the reflective element has an inner sidewall contacting the first dielectric layer, and the inner sidewall has a zigzag profile. The second dielectric layer is disposed on the first dielectric layer and the reflective element. The color filter layer is disposed on the backside of the semiconductor substrate.
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