公开(公告)号：US20250107207A1

公开(公告)日：2025-03-27

申请号：US18974319

申请日：2024-12-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chi-Sheng LAI ,  Wei-Chung SUN ,  Yu-Bey WU ,  Yuan-Ching PENG ,  Yu-Shan LU ,  Li-Ting CHEN ,  Shih-Yao LIN ,  Yu-Fan PENG ,  Kuei-Yu KAO ,  Chih-Han LIN ,  Jing Yi YAN ,  Pei-Yi LIU

IPC: H01L29/423 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/40 ,  H01L29/66 ,  H01L29/78 ,  H01L29/786

Abstract: A semiconductor structure includes a semiconductor substrate; fin active regions protruded above the semiconductor substrate; and a gate stack disposed on the fin active regions; wherein the gate stack includes a high-k dielectric material layer, and various metal layers disposed on the high-k dielectric material layer. The gate stack has an uneven profile in a sectional view with a first dimension D1 at a top surface, a second dimension D2 at a bottom surface, and a third dimension D3 at a location between the top surface and the bottom surface, and wherein each of D1 and D2 is greater than D3.