公开(公告)号：US20180145144A1

公开(公告)日：2018-05-24

申请号：US15784877

申请日：2017-10-16

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA

Inventor： Teruaki KUMAZAWA ,  Narumasa SOEJIMA ,  Yuichi TAKEUCHI

IPC: H01L29/47 ,  H01L29/06 ,  H01L29/16 ,  H01L21/04 ,  H01L21/285

CPC classification number: H01L29/47 ,  H01L21/0465 ,  H01L21/0495 ,  H01L21/28537 ,  H01L21/28581 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/66143 ,  H01L29/872

Abstract: A method of manufacturing a semiconductor device includes: setting a plurality of main semiconductor wafers and a plurality of sub semiconductor wafers in a load lock chamber of an electrode forming equipment; repeating a wafer-transfer and electrode-formation process of transferring at least one of the main semiconductor wafers from the load lock chamber to the film formation chamber in a state where the load lock chamber and the film formation chamber are decompressed and then forming a surface electrode on a surface of the at least one main semiconductor wafer transferred in the film formation chamber; removing the main semiconductor wafers on which the surface electrodes have been formed and the sub semiconductor wafers from the electrode forming equipment without forming an electrode on the sub semiconductor wafers by the electrode forming equipment; and making the surface electrodes Schottky-contact the main semiconductor wafers.

公开(公告)号：US20230178497A1

公开(公告)日：2023-06-08

申请号：US18055618

申请日：2022-11-15

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： Masashi UECHA ,  Yuji NAGUMO ,  Hiroki TSUMA ,  Teruaki KUMAZAWA

IPC: H01L23/00 ,  H01L29/16 ,  H01L21/78

CPC classification number: H01L23/562 ,  H01L29/1608 ,  H01L21/78 ,  H01L29/0623

Abstract: A semiconductor device includes a semiconductor substrate, an end region, and an active region. The end region is located above the semiconductor substrate, has a frame shape, and has been brought into contact with a blade in a scribing process. The active region is surrounded by the end region and is configured to serve as a path of a main current. The end region has a stress relaxation film on an outermost surface of the end region.

公开(公告)号：US20220130675A1

公开(公告)日：2022-04-28

申请号：US17463243

申请日：2021-08-31

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation ,  DISCO Corporation

Inventor： Masatake NAGAYA ,  Teruaki KUMAZAWA ,  Yuji NAGUMO ,  Kazuya HIRATA ,  Asahi NOMOTO

IPC: H01L21/268 ,  H01L21/78 ,  H01L21/02

Abstract: A method of manufacturing a chip formation wafer includes: forming an epitaxial film on a first main surface of a silicon carbide wafer to provide a processed wafer having one side adjacent to the epitaxial film and the other side; irradiating a laser beam into the processed wafer from the other side of the processed wafer so as to form an altered layer along a surface direction of the processed wafer; and separating the processed wafer with the altered layer as a boundary into a chip formation wafer having the one side of the processed wafer and a recycle wafer having the other side of the processed wafer. The processed wafer has a beveling portion at an outer edge portion of the processed wafer, and an area of the other side is larger than an area of the one side in the beveling portion.

公开(公告)号：US20180286974A1

公开(公告)日：2018-10-04

申请号：US15765120

申请日：2016-09-16

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Teruaki KUMAZAWA ,  Shinichiro MIYAHARA ,  Sachiko AOI

IPC: H01L29/78 ,  H01L29/417 ,  H01L29/66 ,  H01L29/739 ,  H01L23/31 ,  H01L29/10

Abstract: A provided method of manufacturing a semiconductor device includes formation of an interlayer insulating. The interlayer insulating film includes first and second insulating layers. The first insulating layer covers an upper surface of each of the gate electrodes. The second insulating layer is located on the first insulating layer. A contact hole is provided in the interlayer insulating film at a position between the trenches. Then the interlayer insulating film is heated at a temperature lower than the softening temperature of the first insulating layer and higher than the softening temperature of the second insulating layer so as to make a surface of the second insulating layer into a curved surface so that surfaces of end portions of the second insulating layer are sloping from the corresponding contact holes so as to be displaced upward toward a center of the corresponding trench.