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公开(公告)号:US09952615B2
公开(公告)日:2018-04-24
申请号:US15060447
申请日:2016-03-03
Applicant: Toshiba Memory Corporation
Inventor: Mizuho Yoshida , Junji Musha
CPC classification number: G05F3/16 , G11C5/145 , G11C16/0483 , G11C16/30 , G11C16/32 , H02M3/07 , H03K5/14
Abstract: A charge pump includes a capacitor, a first transistor that is electrically connected between a first terminal of the first capacitor and ground, and a second transistor that is electrically connected between a second terminal of the first capacitor and an output node. During a first operation mode of the charge pump, a voltage that is boosted using the capacitor is output through the output node, and during a second operation mode of the charge pump, the first transistor and the second transistor are maintained in an ON state.
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公开(公告)号:US09941015B2
公开(公告)日:2018-04-10
申请号:US15459170
申请日:2017-03-15
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Kenichi Abe , Masanobu Shirakawa , Mizuho Yoshida , Takuya Futatsuyama
CPC classification number: G11C16/3459 , G11C11/5628 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/16 , G11C16/32 , G11C16/3445 , G11C16/3481 , G11C29/42 , G11C2211/5621 , G11C2211/5648
Abstract: A semiconductor memory device includes first to third pages, first to the third word lines, and a row decoder. In data writing, data is written into the first page before data is written into the second page. The row decoder is configured to apply first to third verify voltages to gates of first to third memory cells in a program verify operation.
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