公开(公告)号：US11837518B2

公开(公告)日：2023-12-05

申请号：US17003382

申请日：2020-08-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Michael Todd Wyant ,  Matthew John Sherbin ,  Christopher Daniel Manack ,  Patrick Francis Thompson ,  You Chye How

IPC: H01L23/31 ,  H01L23/552 ,  H01L21/56 ,  H01L21/78 ,  H01L21/683

CPC classification number: H01L23/3185 ,  H01L21/561 ,  H01L21/568 ,  H01L21/78 ,  H01L23/3171 ,  H01L23/552 ,  H01L21/6836 ,  H01L2221/68336

Abstract: In examples, a chip scale package (CSP) comprises a semiconductor die; a conductive terminal coupled to the semiconductor die; and a non-conductive coat covering a backside of the semiconductor die and a sidewall of the semiconductor die. The non-conductive coat has a thickness of less than 45 microns.

公开(公告)号：US20240055313A1

公开(公告)日：2024-02-15

申请号：US18494198

申请日：2023-10-25

Applicant: Texas Instruments Incorporated

Inventor： Michael Todd Wyant ,  Matthew John Sherbin ,  Christopher Daniel Manack ,  Patrick Francis Thompson ,  You Chye How

IPC: H01L23/31 ,  H01L23/552 ,  H01L21/56 ,  H01L21/78

CPC classification number: H01L23/3185 ,  H01L23/3171 ,  H01L23/552 ,  H01L21/568 ,  H01L21/78 ,  H01L21/561 ,  H01L2221/68336 ,  H01L21/6836

Abstract: In examples, a chip scale package (CSP) comprises a semiconductor die; a conductive terminal coupled to the semiconductor die; and a non-conductive coat covering a backside of the semiconductor die and a sidewall of the semiconductor die. The non-conductive coat has a thickness of less than 45 microns.

公开(公告)号：US20220208571A1

公开(公告)日：2022-06-30

申请号：US17139072

申请日：2020-12-31

Applicant: Texas Instruments Incorporated

Inventor： Byron Harry Gibbs ,  Michael Todd Wyant

IPC: H01L21/67 ,  H01L21/78 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

Abstract: In a described example, an apparatus includes: a process chamber configured for a pressure greater than one atmosphere, having a device chuck configured to support electronic devices that are mounted on package substrates and partially covered in mold compound, the electronic devices spaced from one another by saw streets; and a saw in the process chamber configured to cut through the mold compound and package substrates in the saw streets to separate the molded electronic devices one from another.

公开(公告)号：US20210210440A1

公开(公告)日：2021-07-08

申请号：US16737237

申请日：2020-01-08

Applicant: Texas Instruments Incorporated

Inventor： Christopher Daniel Manack ,  Qiao Chen ,  Michael Todd Wyant ,  Matthew John Sherbin ,  Patrick Francis Thompson

IPC: H01L23/58 ,  H01L23/532 ,  H01L23/528

Abstract: An integrated circuit (IC) die includes a substrate with circuitry configured for at least one function including metal interconnect levels thereon including a top metal interconnect level and a bottom metal interconnect level, with a passivation layer on the top metal interconnect level. A scribe street is around a periphery of the IC die, the scribe street including a scribe seal utilizing at least two of the plurality of metal interconnect levels, an inner metal meander stop ring including at least the top metal interconnect level located outside the scribe seal, wherein the scribe seal and the inner metal meander stop ring are separated by a first separation gap. An outer metal meander stop ring including at least the top metal interconnect level is located outside the inner metal stop ring, wherein the outer stop ring and the inner stop ring are separated by a second separation gap.

公开(公告)号：US11676829B2

公开(公告)日：2023-06-13

申请号：US17139072

申请日：2020-12-31

Applicant: Texas Instruments Incorporated

Inventor： Byron Harry Gibbs ,  Michael Todd Wyant

IPC: H01L21/67 ,  H01L21/78 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L21/67092 ,  H01L21/4825 ,  H01L21/565 ,  H01L21/78 ,  H01L23/562 ,  H01L2223/5446

Abstract: In a described example, an apparatus includes: a process chamber configured for a pressure greater than one atmosphere, having a device chuck configured to support electronic devices that are mounted on package substrates and partially covered in mold compound, the electronic devices spaced from one another by saw streets; and a saw in the process chamber configured to cut through the mold compound and package substrates in the saw streets to separate the molded electronic devices one from another.

公开(公告)号：US20230040267A1

公开(公告)日：2023-02-09

申请号：US17960568

申请日：2022-10-05

Applicant: Texas Instruments Incorporated

Inventor： Michael Todd Wyant ,  Dave Charles Stepniak ,  Matthew John Sherbin ,  Sada Hiroyuki ,  Shoichi Iriguchi ,  Genki Yano

IPC: H01L21/78 ,  H01L21/683 ,  H01L21/67 ,  H01L21/268 ,  H01L23/58

Abstract: In a described example, a method includes: applying a dicing tape over a metal layer covering a portion of a surface of scribe streets on a device side of a semiconductor wafer that includes semiconductor device dies formed thereon separated from one another by the scribe streets; and placing the semiconductor wafer with the device side facing away from a laser in a stealth dicing machine. A power of a laser beam is adjusted to a first power level. The laser beam is focused through the non-device side of the semiconductor wafer to a first focal depth in the metal layer. The laser beam scans across the scribe streets and ablates the metal layer in the scribe streets. The method continues by singulating the semiconductor device dies using stealth dicing along the scribe streets in the stealth dicing machine.

公开(公告)号：US20200266133A1

公开(公告)日：2020-08-20

申请号：US16277462

申请日：2019-02-15

Applicant: Texas Instruments Incorporated

Inventor： Bradley Andrew Glasscock ,  Michael Todd Wyant ,  Christopher Daniel Manack

IPC: H01L23/495 ,  H01L23/00 ,  H01L25/16 ,  H01L23/31 ,  H01L21/683

Abstract: A packaged semiconductor device includes at least one semiconductor die having circuitry with circuit nodes coupled to bond pads that have bonding features thereon. A plurality of leads or lead terminals include at least metal bars, wherein the plurality of leads or lead terminals are exclusive of any saw marks. The semiconductor die is flipchip attached with a bonded connection between respective bonding features and respective leads or lead terminals.

公开(公告)号：US20200051860A1

公开(公告)日：2020-02-13

申请号：US16057126

申请日：2018-08-07

Applicant: Texas Instruments Incorporated

Inventor： Michael Todd Wyant ,  Dave Charles Stepniak ,  Matthew John Sherbin ,  Sada Hiroyuki ,  Shoichi Iriguchi ,  Genki Yano

IPC: H01L21/78 ,  H01L21/683 ,  H01L23/58 ,  H01L21/67 ,  H01L21/268

Abstract: In a described example, a method includes: applying a dicing tape over a metal layer covering a portion of a surface of scribe streets on a device side of a semiconductor wafer that includes semiconductor device dies formed thereon separated from one another by the scribe streets; and placing the semiconductor wafer with the device side facing away from a laser in a stealth dicing machine. A power of a laser beam is adjusted to a first power level. The laser beam is focused through the non-device side of the semiconductor wafer to a first focal depth in the metal layer. The laser beam scans across the scribe streets and ablates the metal layer in the scribe streets. The method continues by singulating the semiconductor device dies using stealth dicing along the scribe streets in the stealth dicing machine.

公开(公告)号：US12198982B2

公开(公告)日：2025-01-14

申请号：US17960568

申请日：2022-10-05

Applicant: Texas Instruments Incorporated

Inventor： Michael Todd Wyant ,  Dave Charles Stepniak ,  Matthew John Sherbin ,  Sada Hiroyuki ,  Shoichi Iriguchi ,  Genki Yano

IPC: H01L21/78 ,  H01L21/268 ,  H01L21/67 ,  H01L21/683 ,  H01L23/58

Abstract: In a described example, a method includes: applying a dicing tape over a metal layer covering a portion of a surface of scribe streets on a device side of a semiconductor wafer that includes semiconductor device dies formed thereon separated from one another by the scribe streets; and placing the semiconductor wafer with the device side facing away from a laser in a stealth dicing machine. A power of a laser beam is adjusted to a first power level. The laser beam is focused through the non-device side of the semiconductor wafer to a first focal depth in the metal layer. The laser beam scans across the scribe streets and ablates the metal layer in the scribe streets. The method continues by singulating the semiconductor device dies using stealth dicing along the scribe streets in the stealth dicing machine.

公开(公告)号：US20230387036A1

公开(公告)日：2023-11-30

申请号：US17826764

申请日：2022-05-27

Applicant: Texas Instruments Incorporated

Inventor： Michael Todd Wyant ,  Joseph O. Liu ,  Christopher Daniel Manack

IPC: H01L23/544 ,  H01L23/31 ,  H01L23/495 ,  H01L23/00 ,  H01L21/66 ,  H01L21/56 ,  H01L21/268

CPC classification number: H01L23/544 ,  H01L23/3107 ,  H01L23/495 ,  H01L24/48 ,  H01L22/12 ,  H01L21/56 ,  H01L21/268 ,  H01L2224/48245 ,  H01L2223/5446

Abstract: A method includes performing a laser ablation process that removes a portion of a wafer to form a trench in a scribe region between adjacent die regions of the wafer, the trench extending from a first side of the wafer toward an opposite second side of the wafer, the trench extending through a metallization structure and an active circuit portion of the wafer, and a bottom of the trench spaced apart from the second side of the wafer. The method also includes performing a wafer expansion process that separates individual semiconductor dies from the wafer after the laser ablation process.