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公开(公告)号：US20180212614A1
公开(公告)日：2018-07-26
申请号：US15927157
申请日：2018-03-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Jagannathan VENKATARAMAN , Eeshan MIGLANI
CPC classification number: H03M1/08 , H03K17/162 , H03K17/165 , H03M1/742
Abstract: At least some embodiments are directed to a system that comprises a differential switch network comprising first and second output nodes, first and second transistors coupled to the network, and first and second resistors coupled to the first and second transistors. The DAC also comprises a voltage source coupled to the first resistor and a ground connection coupled to the second resistor. The DAC further includes a capacitor coupled to the first and second transistors and to the second resistor.
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公开(公告)号：US20170299429A1
公开(公告)日：2017-10-19
申请号：US15491729
申请日：2017-04-19
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Hussam AHMED , Jagannathan VENKATARAMAN , Sandeep Kesrimal OSWAL , Hari Babu TIPPANA , Anand Hariraj UDUPA
IPC: G01J1/44 , H01L31/107
CPC classification number: G01J1/44 , G01J2001/444 , G01J2001/446 , H01L31/02019 , H01L31/107
Abstract: At least some embodiments are directed to a light detection system comprising a photodiode, a transimpedance amplifier (TIA) having a differential output and a differential input coupled across the photodiode, a first bias current source coupled to an anode of the photodiode, and a second bias current source coupled to a cathode of the photodiode. The system also comprises a dynamic control logic coupled to the first and second bias current sources and configured to vary bias currents provided by the first and second bias current sources based on the differential output such that the photodiode is reverse-biased.
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公开(公告)号：US20160341819A1
公开(公告)日：2016-11-24
申请号：US14856205
申请日：2015-09-16
Applicant: Texas Instruments Incorporated
Inventor： Jagannathan VENKATARAMAN
Abstract: The disclosure provides a circuit. The circuit includes an amplifier and a digital to analog converter (DAC). The amplifier receives a reference voltage at an input node of the amplifier. The DAC is coupled to the amplifier through a refresh switch. The DAC includes one or more current elements. Each current element of the one or more current elements receives a clock. The DAC includes one or more switches corresponding to the one or more current elements. A feedback switch is coupled between the one or more switches and a feedback node of the amplifier. The DAC provides a feedback voltage at the feedback node of the amplifier.
Abstract translation: 本公开提供一种电路。 该电路包括放大器和数模转换器（DAC）。 放大器在放大器的输入节点处接收参考电压。 DAC通过刷新开关耦合到放大器。 DAC包括一个或多个电流元件。 一个或多个电流元件的每个电流元件接收时钟。 DAC包括一个或多个对应于一个或多个电流元件的开关。 反馈开关耦合在一个或多个开关和放大器的反馈节点之间。 DAC在放大器的反馈节点提供反馈电压。
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公开(公告)号：US20240146314A1
公开(公告)日：2024-05-02
申请号：US17977834
申请日：2022-10-31
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Karthikeyan GUNASEKARAN , Jagannathan VENKATARAMAN
CPC classification number: H03L7/0895 , H03L7/0992
Abstract: In an example, a system includes a phase frequency detector (PFD) coupled to a charge pump, and a loop filter coupled to the charge pump. The system also includes a voltage controlled oscillator (VCO) coupled to the loop filter. The system includes a fast Fourier transform (FFT) engine coupled to an output of the VCO, the FFT engine configured to estimate a phase and a magnitude of reference spurs of an input reference signal. The system includes spur correction circuitry coupled to an input of the VCO, the spur correction circuitry configured to correct for the reference spurs of the input reference signal based at least in part on the phase and magnitude of the reference spurs.
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公开(公告)号：US20220239304A1
公开(公告)日：2022-07-28
申请号：US17538746
申请日：2021-11-30
Applicant: Texas Instruments Incorporated
Inventor： Karthikeyan GUNASEKARAN , Snehasish ROYCHOWDHURY , Rakesh MANJUNATH , Aswath V S , Sthanunathan RAMAKRISHNAN , Sarma Sudareswara GUNTURI , Rahul SHARMA , Jagannathan VENKATARAMAN , Nagarajan VISWANATHAN
Abstract: A spur correction system for a transmit chain having an interleaving multiplexer. In some embodiments, the spur correction system includes a spur sense chain, a correction controller, and a Q path corrector. The interleaving multiplexer combines signals from multiple bands in response to a clock signal. The spur sense chain estimates an error that is in phase with the clock signal (an I-phase error) and an error that is a derivative of the clock signal (a Q-phase error). The correction controller compensates for the estimated I-phase error by injecting an I-phase correction signal into the transmit chain. The Q path corrector compensates for the estimated Q-phase error by selectively connecting one or more capacitors within the interleaving multiplexer.
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Patent Agency Ranking
公开(公告)号：US20200169279A1
公开(公告)日：2020-05-28
申请号：US16692006
申请日：2019-11-22
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Sarma Sundareswara GUNTURI , Chandrasekhar SRIRAM , Jawaharlal TANGUDU , Eeshan MIGLANI , Jagannathan VENKATARAMAN
Abstract: A non-linearity correction module, an optional droop corrector, and a zero-IF receiver with the non-linearity correction module and an optional droop corrector, wherein the non-linearity correction module is configured to generate a non-linearity term scaled to mitigate an inter-modulation component term of a RF signal received by the zero-IF receiver based on a test signal to enhance linearity in the zero-IF receiver and the optional droop corrector is configured to compensate a droop within a signal band of interest, caused by an analog low pass filter filtering a RF signal received by the zero-IF receiver, before a down-converted RF signal is fed into the non-linearity module.
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公开(公告)号：US20170265771A1
公开(公告)日：2017-09-21
申请号：US15465484
申请日：2017-03-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Anand Hariraj UDUPA , Hussam AHMED , Jagannathan VENKATARAMAN , Sandeep Kesrimal OSWAL , Prabin Krishna YADAV , Anand REGHUNATHAN , Kiran RAJMOHAN
Abstract: A system may comprise: an excitation current source; a first electrode coupled to the excitation current source; and a second electrode coupled to the excitation current source. The first and second electrodes may be configured to pass an excitation current from the excitation current source through a human body. First and second calibration resistors may be coupled to and positioned between the excitation current source and the first electrode. Third and fourth calibration resistors may be coupled to and positioned between the excitation current source and the second electrode. The system may also comprise a sensor configured to measure voltages across each of the first, second, third, and fourth calibration resistors.
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8.发明申请NON-LINEARITY CORRECTION IN PHASE-TO-DEPTH CONVERSION IN 3D TIME OF FLIGHT SYSTEMS 审中-公开飞行系统3D时间相位到深度转换的非线性校正公开(公告)号：US20170041589A1
公开(公告)日：2017-02-09
申请号：US15231261
申请日：2016-08-08
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Bharat PATIL , Jagannathan VENKATARAMAN , Karthik RAJAGOPAL
IPC: H04N13/02
Abstract: A time-of-flight (TOF) camera system for correcting non-linearity in phase-to-depth measurements. The TOF camera system includes a module to simulate movement of a target object by generating delays between modulation signals emitted from a transmitter and demodulation signals received by a sensor. For each delay, the TOF system calculates and stores a phase output corresponding to a simulated distance of the target object. The TOF camera may consult the stored data during normal operation to perform in-field calibration.
Abstract translation: 飞行时间（TOF）相机系统，用于校正相位到深度测量中的非线性。 TOF摄像机系统包括通过在发射机发射的调制信号和由传感器接收的解调信号之间产生延迟来模拟目标物体的移动的模块。 对于每个延迟，TOF系统计算并存储对应于目标对象的模拟距离的相位输出。 在正常操作期间，TOF摄像机可以查询存储的数据，以进行现场校准。
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公开(公告)号：US20220271764A1
公开(公告)日：2022-08-25
申请号：US17182339
申请日：2021-02-23
Applicant: Texas Instruments Incorporated
Inventor： Prasanth K , Eeshan MIGLANI , Visvesvaraya Appala PENTAKOTA , Kartik GOEL , Jagannathan VENKATARAMAN , Sai Aditya Krishnaswamy NURANI
Abstract: A voltage-to-delay converter converts input signals into delay signals, and includes: a first stage for receiving the input signals and for generating intermediate output signals, wherein timing of the intermediate output signals corresponds to voltages of the input signals, and wherein the first stage has a voltage source for providing a rail-to-rail voltage; and a second stage for receiving the intermediate output signals and for generating rail-to-rail output signals, wherein timing of the rail-to-rail output signals corresponds to the timing of the intermediate output signals, and wherein voltage of the rail-to-rail output signals corresponds to the rail-to-rail voltage. A voltage-to-delay converter block is also described. A circuit for receiving differential input signals, generating corresponding output signals, and removing common mode signals from the output signals is also described.
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公开(公告)号：US20210152126A1
公开(公告)日：2021-05-20
申请号：US17158449
申请日：2021-01-26
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Rahul SHARMA , Jagannathan VENKATARAMAN , Eeshan MIGLANI , Sandeep Kesrimal OSWAL
Abstract: A system includes a Zero IF transmitter having a mixer and a programmable gain stage. The Zero IF transmitter also includes an intermediate stage between the mixer and the programmable gain stage, wherein the intermediate stage is configured to decouple the mixer and the programmable gain stage.
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