ELECTRONIC COMPONENT EMBEDDED SUBSTRATE AND CIRCUIT MODULE USING THE SAME

    公开(公告)号:US20220238474A1

    公开(公告)日:2022-07-28

    申请号:US17618666

    申请日:2020-06-05

    Abstract: An electronic component embedded substrate includes an electronic component and a heat transfer block which are embedded in insulating layers, a first wiring patterns facing a first surface of the heat transfer block, a second wiring pattern facing a second surface of the heat transfer block, a first via conductor connecting the first wiring pattern and the first surface of the heat transfer block, and a second via conductor connecting the second wiring pattern and the second surface of the heat transfer block. The first and second surfaces and are insulated from each other. Thus, even when an electronic component of a type having large heat generation and being prohibited from connecting to a ground pattern is mounted, the second wiring pattern functioning as a heat dissipation pattern can be connected to a ground pattern on a motherboard.

    MULTILAYER CIRCUIT BOARD
    3.
    发明申请

    公开(公告)号:US20190164904A1

    公开(公告)日:2019-05-30

    申请号:US16185596

    申请日:2018-11-09

    Abstract: Disclosed herein is a multilayer circuit board that includes a plurality of conductor layers laminated with insulating layers interposed therebetween. The plurality of conductor layers include a first conductor layer, a second conductor layer, and a first shield layer disposed between the first and second conductor layers. The first shield layer is smaller in conductor thickness than the first and second conductor layers and is connected to none of the plurality of conductor layers within its surface.

    SENSOR PACKAGE SUBSTRATE, SENSOR MODULE HAVING THE SAME, AND SENSOR PACKAGE SUBSTRATE MANUFACTURING METHOD

    公开(公告)号:US20220267142A1

    公开(公告)日:2022-08-25

    申请号:US17620485

    申请日:2020-06-05

    Abstract: A sensor package substrate has through holes V1 and V2 at a position overlapping a sensor chip mounting area. The through hole V1 has a minimum inner diameter at a depth position D1, and the through hole V2 has a minimum inner diameter at a depth position D2 different from the depth position D1. Thus, since the plurality of through holes are formed at a position overlapping the sensor chip mounting area, the diameter of each of the through holes can be reduced. This makes foreign matters unlikely to enter through the through holes, and a reduction in the strength of the substrate is suppressed. In addition, since the depth position D1 and depth position D2 are located at different depth levels, it is possible to sufficiently maintain the strength of a part of the substrate that is positioned between the through holes V1 and V2.

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