公开(公告)号：US20240088042A1

公开(公告)日：2024-03-14

申请号：US18152778

申请日：2023-01-11

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： SHU-WEI LI ,  HAN-TANG HUNG ,  YU-CHEN CHAN ,  CHIEN-HSIN HO ,  SHIN-YI YANG ,  MING-HAN LEE ,  SHAU-LIN SHUE

IPC分类号： H01L23/532 ,  H01L21/768 ,  H01L23/522

CPC分类号： H01L23/53276 ,  H01L21/76885 ,  H01L23/5226 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266 ,  H01L23/5329

摘要： A semiconductor structure includes a dielectric layer over a substrate, a via conductor over the substrate and in the dielectric layer, and a first graphene layer disposed over the via conductor. In some embodiments, a top surface of the via conductor and a top surface of the dielectric layer are level. In some embodiments, the first graphene layer overlaps the via conductor from a top view. In some embodiments, the semiconductor structure further includes a second graphene layer under the via conductor and a third graphene layer between the dielectric layer and the via conductor. In some embodiments, the second graphene layer is between the substrate and the via conductor.

公开(公告)号：US20230037554A1

公开(公告)日：2023-02-09

申请号：US17395915

申请日：2021-08-06

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： SHU-WEI LI ,  YU-CHEN CHAN ,  MENG-PEI LU ,  SHIN-YI YANG ,  MING-HAN LEE

IPC分类号： H01L23/532 ,  H01L23/522 ,  H01L21/768

摘要： A semiconductor structure and method of manufacturing a semiconductor structure are provided. The semiconductor structure comprises at least one two-dimensional (2D) conductive structure; a dielectric layer disposed on the 2D conductive structure; and at least one interconnect structure disposed in the dielectric layer and extending into the 2D conductive structure, wherein the interconnect structure laterally connects to at least one edge of the 2D conductive structure.

公开(公告)号：US20220359378A1

公开(公告)日：2022-11-10

申请号：US17814844

申请日：2022-07-26

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： MENG-PEI LU ,  SHIN-YI YANG ,  SHU-WEI LI ,  CHIN-LUNG CHUNG ,  MING-HAN LEE

IPC分类号： H01L23/522 ,  H01L23/532 ,  H01L21/768

摘要： A method for forming a semiconductor structure includes following operations. A hybrid layered structure is formed. The hybrid layered structure includes at least a 2D material layer and a first 3D material layer. Portions of the hybrid layered structure are removed to form a plurality of conductive features and at least an opening between the conductive features. A dielectric material is formed to fill the opening and to form an air gap sealed within.

公开(公告)号：US20240363538A1

公开(公告)日：2024-10-31

申请号：US18768002

申请日：2024-07-10

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： SHU-WEI LI ,  YU-CHEN CHAN ,  MENG-PEI LU ,  SHIN-YI YANG ,  MING-HAN LEE

IPC分类号： H01L23/532 ,  H01L21/768 ,  H01L23/522

CPC分类号： H01L23/53276 ,  H01L21/76805 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/53257 ,  H01L23/53271 ,  H01L23/5328

摘要： A semiconductor structure and method of manufacturing a semiconductor structure are provided. The semiconductor structure comprises at least one two-dimensional (2D) conductive structure; a dielectric structure disposed on the 2D conductive structure; and at least one interconnect structure disposed in the dielectric layer and extending into the 2D conductive structure. The interconnect structure laterally contacts the 2D conductive structure.

公开(公告)号：US20220068799A1

公开(公告)日：2022-03-03

申请号：US17008141

申请日：2020-08-31

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： MENG-PEI LU ,  SHIN-YI YANG ,  SHU-WEI LI ,  CHIN-LUNG CHUNG ,  MING-HAN LEE

IPC分类号： H01L23/522 ,  H01L23/532 ,  H01L21/768

摘要： A semiconductor structure includes a substrate, a plurality of conductive features disposed over the substrate, and an isolation structure between conductive features and separating the conductive features from each other. Each of the conductive features includes a first metal layer and a 2D material layer. Another semiconductor structure includes a first conductive feature, a dielectric structure over the first conductive feature, a second conductive feature in the dielectric structure and coupled to the first conductive feature, and a conductive line over and coupled to the second conductive feature. In some embodiments, the conductive line includes a first 3D material layer, a first 2D material layer, and a second 3D material layer. The first 2D material layer is disposed between the first 3D material layer and the second 3D material layer.