公开(公告)号：US07674665B2

公开(公告)日：2010-03-09

申请号：US12149894

申请日：2008-05-09

申请人： Sung-ho Park ,  Jin-seo Noh ,  Joong S. Jeon ,  Eun-ju Bae

发明人： Sung-ho Park ,  Jin-seo Noh ,  Joong S. Jeon ,  Eun-ju Bae

IPC分类号： H01L21/338

CPC分类号： H01L29/785 ,  H01L29/66795 ,  H01L29/7839

摘要： Provided is a method of fabricating a Schottky barrier transistor. The method includes (a) forming a pair of cavities for forming a source forming portion and a drain forming portion having a predetermined depth and parallel to each other and a channel forming portion having a fin shape between the cavities in a substrate; (b) filling the pair of cavities with a metal; (c) forming a channel, a source, and a drain by patterning the channel forming portion, the source forming portion, and the drain forming portion in a direction perpendicular to a lengthwise direction of the channel forming portion; (d) sequentially forming a gate oxide layer and a gate metal layer that cover the channel, the source, and the drain on the substrate; and (e) forming a gate electrode corresponding to the channel by patterning the gate metal layer, wherein one of the operations (b) through (e) further comprises forming a Schottky barrier by annealing the substrate.

摘要翻译： 提供了制造肖特基势垒晶体管的方法。 该方法包括：（a）形成用于形成具有预定深度并彼此平行的源极形成部分和漏极形成部分的一对空腔，以及在衬底中的空腔之间具有翅片形状的沟道形成部分; （b）用金属填充一对空腔; （c）通过在垂直于沟道形成部分的长度方向的方向上图形化沟道形成部分，源形成部分和漏极形成部分来形成沟道，源极和漏极; （d）顺序地形成覆盖衬底上的沟道，源极和漏极的栅极氧化物层和栅极金属层; 以及（e）通过对所述栅极金属层进行构图来形成对应于所述沟道的栅电极，其中，所述（b）至（e）中的一个还包括通过使所述衬底退火来形成肖特基势垒。

公开(公告)号：US20100112771A1

公开(公告)日：2010-05-06

申请号：US12654715

申请日：2009-12-30

申请人： Sung-ho Park ,  Jin-seo Noh ,  Joong S. Jeon ,  Eun-ju Bae

发明人： Sung-ho Park ,  Jin-seo Noh ,  Joong S. Jeon ,  Eun-ju Bae

IPC分类号： H01L21/336

CPC分类号： H01L29/785 ,  H01L29/66795 ,  H01L29/7839

摘要： Provided is a method of fabricating a Schottky barrier transistor. The method includes (a) forming a pair of cavities for forming a source forming portion and a drain forming portion having a predetermined depth and parallel to each other and a channel forming portion having a fin shape between the cavities in a substrate;(b) filling the pair of cavities with a metal; (c) forming a channel, a source, and a drain by patterning the channel forming portion, the source forming portion, and the drain forming portion in a direction perpendicular to a lengthwise direction of the channel forming portion; (d) sequentially forming a gate oxide layer and a gate metal layer that cover the channel, the source, and the drain on the substrate; and (e) forming a gate electrode corresponding to the channel by patterning the gate metal layer, wherein one of the operations (b) through (e) further comprises forming a Schottky barrier by annealing the substrate.

公开(公告)号：US20090162983A1

公开(公告)日：2009-06-25

申请号：US12149894

申请日：2008-05-09

申请人： Sung-ho Park ,  Jin-seo Noh ,  Joong S. Jeon ,  Eun-ju Bae

发明人： Sung-ho Park ,  Jin-seo Noh ,  Joong S. Jeon ,  Eun-ju Bae

IPC分类号： H01L21/336

CPC分类号： H01L29/785 ,  H01L29/66795 ,  H01L29/7839

摘要： Provided is a method of fabricating a Schottky barrier transistor. The method includes (a) forming a pair of cavities for forming a source forming portion and a drain forming portion having a predetermined depth and parallel to each other and a channel forming portion having a fin shape between the cavities in a substrate; (b) filling the pair of cavities with a metal; (c) forming a channel, a source, and a drain by patterning the channel forming portion, the source forming portion, and the drain forming portion in a direction perpendicular to a lengthwise direction of the channel forming portion; (d) sequentially forming a gate oxide layer and a gate metal layer that cover the channel, the source, and the drain on the substrate; and (e) forming a gate electrode corresponding to the channel by patterning the gate metal layer, wherein one of the operations (b) through (e) further comprises forming a Schottky barrier by annealing the substrate.

摘要翻译： 提供了制造肖特基势垒晶体管的方法。 该方法包括：（a）形成用于形成具有预定深度并彼此平行的源极形成部分和漏极形成部分的一对空腔，以及在衬底中的空腔之间具有翅片形状的沟道形成部分; （b）用金属填充一对空腔; （c）通过在垂直于沟道形成部分的长度方向的方向上图形化沟道形成部分，源形成部分和漏极形成部分来形成沟道，源极和漏极; （d）顺序地形成覆盖衬底上的沟道，源极和漏极的栅极氧化物层和栅极金属层; 以及（e）通过对所述栅极金属层进行构图来形成对应于所述沟道的栅电极，其中，所述（b）至（e）中的一个还包括通过使所述衬底退火来形成肖特基势垒。

公开(公告)号：US07902011B2

公开(公告)日：2011-03-08

申请号：US12654715

申请日：2009-12-30

申请人： Sung-ho Park ,  Jin-seo Noh ,  Joong S. Jeon ,  Eun-ju Bae

发明人： Sung-ho Park ,  Jin-seo Noh ,  Joong S. Jeon ,  Eun-ju Bae

IPC分类号： H01L21/338

CPC分类号： H01L29/785 ,  H01L29/66795 ,  H01L29/7839

摘要： Provided is a method of fabricating a Schottky barrier transistor. The method includes (a) forming a pair of cavities for forming a source forming portion and a drain forming portion having a predetermined depth and parallel to each other and a channel forming portion having a fin shape between the cavities in a substrate; (b) filling the pair of cavities with a metal; (c) forming a channel, a source, and a drain by patterning the channel forming portion, the source forming portion, and the drain forming portion in a direction perpendicular to a lengthwise direction of the channel forming portion; (d) sequentially forming a gate oxide layer and a gate metal layer that cover the channel, the source, and the drain on the substrate; and (e) forming a gate electrode corresponding to the channel by patterning the gate metal layer, wherein one of the operations (b) through (e) further comprises forming a Schottky barrier by annealing the substrate.

摘要翻译： 提供了制造肖特基势垒晶体管的方法。 该方法包括：（a）形成用于形成具有预定深度并彼此平行的源极形成部分和漏极形成部分的一对空腔，以及在衬底中的空腔之间具有翅片形状的沟道形成部分; （b）用金属填充一对空腔; （c）通过在垂直于沟道形成部分的长度方向的方向上图形化沟道形成部分，源形成部分和漏极形成部分来形成沟道，源极和漏极; （d）顺序地形成覆盖衬底上的沟道，源极和漏极的栅极氧化物层和栅极金属层; 以及（e）通过对所述栅极金属层进行构图来形成对应于所述沟道的栅电极，其中，所述（b）至（e）中的一个还包括通过使所述衬底退火来形成肖特基势垒。

公开(公告)号：US20090057783A1

公开(公告)日：2009-03-05

申请号：US12073628

申请日：2008-03-07

申请人： Sung-ho Park ,  Jin-seo Noh ,  Joong-S. Jeon

发明人： Sung-ho Park ,  Jin-seo Noh ,  Joong-S. Jeon

IPC分类号： H01L29/49 ,  H01L21/28

CPC分类号： H01L29/513 ,  H01L21/28088 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/517

摘要： Provided is a semiconductor device and a method of fabricating a metal gate in the semiconductor device. The semiconductor device includes a metal gate formed on a gate insulating film, the metal gate is formed of a mixture of a metal nitride and a metal carbide, and a work function of the metal gate is determined according to ratios of the metal nitride with respect to the metal carbide.

摘要翻译： 提供半导体器件和在半导体器件中制造金属栅极的方法。 半导体器件包括形成在栅极绝缘膜上的金属栅极，金属栅极由金属氮化物和金属碳化物的混合物形成，并且金属栅极的功函数根据金属氮化物的比例来确定 到金属碳化物。

公开(公告)号：US08115264B2

公开(公告)日：2012-02-14

申请号：US12007431

申请日：2008-01-10

申请人： Sung-ho Park ,  Jin-seo Noh ,  Joong S. Jeon

发明人： Sung-ho Park ,  Jin-seo Noh ,  Joong S. Jeon

IPC分类号： H01L29/78

CPC分类号： H01L21/823828 ,  H01L21/28088 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517

摘要： Provided is a semiconductor device that comprises a metal gate having a low sheet resistance characteristic and a high diffusion barrier characteristic and a method of fabricating the metal gate of the semiconductor device. The semiconductor device includes a metal gate formed on a gate insulating film, wherein the metal gate is formed of a metal nitride that contains Al or Si and includes upper and lower portions where the content of Al or Si is relatively high and a central portion where the content of Al or Si is relatively low.

摘要翻译： 提供一种半导体器件，其包括具有低薄层电阻特性和高扩散阻挡特性的金属栅极和制造半导体器件的金属栅极的方法。 半导体器件包括在栅极绝缘膜上形成的金属栅极，其中金属栅极由含有Al或Si的金属氮化物形成，并且包括Al或Si的含量相对较高的上部和下部以及中部， Al或Si的含量相对较低。

公开(公告)号：US07800186B2

公开(公告)日：2010-09-21

申请号：US12073628

申请日：2008-03-07

申请人： Sung-ho Park ,  Jin-seo Noh ,  Joong-S. Jeon

发明人： Sung-ho Park ,  Jin-seo Noh ,  Joong-S. Jeon

IPC分类号： H01L29/78

CPC分类号： H01L29/513 ,  H01L21/28088 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/517

摘要： Provided is a semiconductor device and a method of fabricating a metal gate in the semiconductor device. The semiconductor device includes a metal gate formed on a gate insulating film, the metal gate is formed of a mixture of a metal nitride and a metal carbide, and a work function of the metal gate is determined according to ratios of the metal nitride with respect to the metal carbide.

摘要翻译： 提供半导体器件和在半导体器件中制造金属栅极的方法。 半导体器件包括形成在栅极绝缘膜上的金属栅极，金属栅极由金属氮化物和金属碳化物的混合物形成，并且金属栅极的功函数根据金属氮化物的比例来确定 到金属碳化物。

公开(公告)号：US20090065873A1

公开(公告)日：2009-03-12

申请号：US12007431

申请日：2008-01-10

申请人： Sung-ho Park ,  Jin-seo Noh ,  Joong S. Jeon

发明人： Sung-ho Park ,  Jin-seo Noh ,  Joong S. Jeon

IPC分类号： H01L21/8238 ,  H01L27/092

CPC分类号： H01L21/823828 ,  H01L21/28088 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517

摘要： Provided is a semiconductor device that comprises a metal gate having a low sheet resistance characteristic and a high diffusion barrier characteristic and a method of fabricating the metal gate of the semiconductor device. The semiconductor device includes a metal gate formed on a gate insulating film, wherein the metal gate is formed of a metal nitride that contains Al or Si and includes upper and lower portions where the content of Al or Si is relatively high and a central portion where the content of Al or Si is relatively low.

摘要翻译： 提供一种半导体器件，其包括具有低薄层电阻特性和高扩散阻挡特性的金属栅极和制造半导体器件的金属栅极的方法。 半导体器件包括在栅极绝缘膜上形成的金属栅极，其中金属栅极由含有Al或Si的金属氮化物形成，并且包括Al或Si的含量相对较高的上部和下部以及中部， Al或Si的含量相对较低。

公开(公告)号：US09891102B2

公开(公告)日：2018-02-13

申请号：US13545623

申请日：2012-07-10

申请人： Young Kim ,  I-hun Song ,  Seung-eon Ahn ,  Sang-hun Jeon ,  Chang-jung Kim ,  Sung-ho Park

发明人： Young Kim ,  I-hun Song ,  Seung-eon Ahn ,  Sang-hun Jeon ,  Chang-jung Kim ,  Sung-ho Park

IPC分类号： G09G3/36 ,  G01J1/44 ,  H01L27/146 ,  G06F3/038 ,  G06F3/041 ,  G06F3/042 ,  H01L27/12 ,  H01L31/113 ,  H04N5/3745

CPC分类号： G01J1/44 ,  G06F3/0386 ,  G06F3/0412 ,  G06F3/042 ,  G09G3/3648 ,  H01L27/1225 ,  H01L27/14609 ,  H01L27/14681 ,  H01L31/1136 ,  H04N5/3745

摘要： In a simplified light sensing circuit, a light sensing apparatus including the light sensing circuit, a method of driving the light sensing apparatus, and an image acquisition apparatus and optical touch screen apparatus including the light sensing apparatus, the light sensing circuit includes an oxide semiconductor transistor including a channel layer including an oxide semiconductor material, for each pixel. The oxide semiconductor transistor is configured to operate as a light sensing device that senses light and a switch that outputs light sensing data.

公开(公告)号：US20120274608A1

公开(公告)日：2012-11-01

申请号：US13545623

申请日：2012-07-10

申请人： Young Kim ,  I-hun Song ,  Seung-eon Ahn ,  Sang-hun Jeon ,  Chang-jung Kim ,  Sung-ho Park

发明人： Young Kim ,  I-hun Song ,  Seung-eon Ahn ,  Sang-hun Jeon ,  Chang-jung Kim ,  Sung-ho Park

IPC分类号： H01L27/148 ,  G06F3/042

CPC分类号： G01J1/44 ,  G06F3/0386 ,  G06F3/0412 ,  G06F3/042 ,  G09G3/3648 ,  H01L27/1225 ,  H01L27/14609 ,  H01L27/14681 ,  H01L31/1136 ,  H04N5/3745

摘要： In a simplified light sensing circuit, a light sensing apparatus including the light sensing circuit, a method of driving the light sensing apparatus, and an image acquisition apparatus and optical touch screen apparatus including the light sensing apparatus, the light sensing circuit includes an oxide semiconductor transistor including a channel layer including an oxide semiconductor material, for each pixel. The oxide semiconductor transistor is configured to operate as a light sensing device that senses light and a switch that outputs light sensing data.

摘要翻译： 在简化的光感测电路中，包括光感测电路的光感测装置，驱动光检测装置的方法以及包括光感测装置的图像获取装置和光学触摸屏装置，光感测电路包括氧化物半导体 晶体管，其包括用于每个像素的包括氧化物半导体材料的沟道层。 氧化物半导体晶体管被配置为作为感测光的光感测装置和输出光检测数据的开关进行操作。