公开(公告)号：US10949110B2

公开(公告)日：2021-03-16

申请号：US16023199

申请日：2018-06-29

Applicant: Seagate Technology LLC

Inventor： Stacey Secatch ,  David W. Claude ,  Steven S. Williams ,  Jeff Rogers

IPC: G06F3/06 ,  G06F13/16 ,  G06F13/42

Abstract: Apparatus and method for managing metadata in a data storage device, such as a solid-state drive (SSD). In some embodiments, a non-volatile memory (NVM) includes a population of semiconductor memory dies. The dies are connected a number of parallel channels such that less than all of the semiconductor dies are connected to each channel. A controller circuit apportions the semiconductor memory dies into a plurality of die sets, with each die set configured to store user data blocks associated with a different user. The controller circuit subsequently rearranges the dies into a different arrangement of die sets so that at least one die is migrated from a first dies set to a second die set. A map manager circuit is configured to establish an array of pointers in a memory to identify contiguous portions of map metadtata that describe user data stored in the at least one migrated die.

公开(公告)号：US20200004971A1

公开(公告)日：2020-01-02

申请号：US16021823

申请日：2018-06-28

Applicant: Seagate Technology LLC

Inventor： Stacey Secatch ,  Steven S. Williams ,  David W. Claude ,  Benjamin J. Scott ,  Kyumsung Lee ,  Stephen H. Perlmutter

IPC: G06F21/60 ,  H04L9/08 ,  G06F1/28 ,  G06F11/10 ,  G06F3/06

Abstract: Apparatus and method for managing entropy in a cryptographic processing system, such as but not limited to a solid-state drive (SSD). In some embodiments, a processing device is operated to transfer data between a host device and a non-volatile memory (NVM). In response to the detection of a power down event associated with the processing device, entropy associated with the power down event is collected and stored in a memory. Upon a subsequent reinitialization of the processing device, the entropy is conditioned and used as an input to a cryptographic function to subsequently transfer data between the host device and the NVM. In some embodiments, the entropy is obtained from the state of a hardware timer that provides a monotonically increasing count for timing control. In other embodiments, the entropy is obtained from a RAID buffer used to store data to a die set of the NVM.

公开(公告)号：US20200004676A1

公开(公告)日：2020-01-02

申请号：US16022822

申请日：2018-06-29

Applicant: Seagate Technology LLC

Inventor： Stephen H. Perlmutter ,  Stacey Secatch ,  Andrew Louder

IPC: G06F12/02 ,  G06F3/06 ,  G11C5/06 ,  G06F11/10

Abstract: Apparatus and method for managing a non-volatile memory (NVM) such as a flash memory in a solid-state drive (SSD). In some embodiments, the NVM is arranged as a plurality of semiconductor memory dies coupled to a controller circuit using a plurality of channels. The controller circuit divides the plurality of dies into a succession of garbage collection units (GCUs). Each GCU is independently erasable and allocatable for storage of user data. The GCUs are staggered so that each GCU is formed from a different subset of the dies in the NVM. In further embodiments, the dies are arranged into NVM sets in accordance with the NVMe (Non-Volatile Memory Express) specification with each NVM set addressable by a different user for storage of data in a separate set of staggered GCUs.

公开(公告)号：US10521287B2

公开(公告)日：2019-12-31

申请号：US16153225

申请日：2018-10-05

Applicant: Seagate Technology LLC

Inventor： Antoine Khoueir ,  Stacey Secatch ,  Kevin Gomez ,  Ryan Goss

IPC: G11C16/26 ,  G06F11/07 ,  G11C16/16 ,  G11C16/34 ,  G06F11/10 ,  G11C11/56 ,  G06F12/02 ,  G11C16/04

Abstract: Method and apparatus for managing data in a semiconductor memory, such as but not limited to a three dimensional (3D) NAND flash memory array. In some embodiments, the memory has non-volatile memory cells arranged into addressable blocks. Each memory cell is configured to store multiple bits. A program/read control circuit programs data sets to and reads data sets from the memory cells in the addressable blocks to service a sequence of host access commands. The circuit concurrently performs background reads in conjunction with the servicing of the host access commands. The background reads result in the reading of a different data set from each of the addressable blocks over each of a succession of time intervals of selected duration. The background reads condition the memory cells prior to a first read operation associated with the host access commands.

公开(公告)号：US20190075090A1

公开(公告)日：2019-03-07

申请号：US16174539

申请日：2018-10-30

Applicant: SEAGATE TECHNOLOGY LLC

Inventor： Stacey Secatch ,  Kristofer C. Conklin ,  Dana L. Simonson ,  Robert W. Moss

IPC: H04L29/06 ,  G06F1/32 ,  G06F12/0802 ,  G06F12/14 ,  G06F1/24 ,  H04L9/08

Abstract: Systems and methods for encryption key shredding to protect non-persistent data are described. In one embodiment, the storage system device may include a storage drive and a controller. In some embodiments, the controller may be configured to power on the storage drive, identify an encryption key on the storage drive created upon powering on the storage drive, and encrypt data in a cache of the storage drive using the encryption key. In some embodiments, the controller may be configured to power off the storage drive and delete the encryption key upon powering off the storage drive. In some cases, the storage drive may include at least one of a solid state drive and a hard disk drive. In some embodiments, the storage drive may include a hybrid storage drive that includes both a solid state drive and a hard disk drive.

公开(公告)号：US20180253235A1

公开(公告)日：2018-09-06

申请号：US15971871

申请日：2018-05-04

Applicant: SEAGATE TECHNOLOGY LLC

Inventor： Dana L. Simonson ,  Kristofer C. Conklin ,  Ryan J. Goss ,  Robert W. Moss ,  Stacey Secatch

IPC: G06F3/06

CPC classification number: G06F3/0605 ,  G06F3/061 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0644 ,  G06F3/0659 ,  G06F3/0679 ,  G06F12/00

Abstract: Systems and methods for enhanced read recovery based on write time information are described. In one embodiment, the systems and methods include opening a block of flash memory cells for programming, tracking a block open time, and performing a read operation of a programmed page from the block based at least in part on the block open time. In some embodiments, the block includes a plurality of pages, each page including a plurality of flash memory cells. In some cases, the block open time includes an amount of time between the block opening for programming to a time the block closes for programming.

公开(公告)号：US20180018469A1

公开(公告)日：2018-01-18

申请号：US15212022

申请日：2016-07-15

Applicant: SEAGATE TECHNOLOGY LLC

Inventor： Robert W. Moss ,  Stacey Secatch ,  Kristofer C. Conklin ,  Dana L. Simonson

IPC: G06F21/60 ,  H04L9/14 ,  G06F21/72

CPC classification number: G06F21/602 ,  G06F3/0623 ,  G06F21/60 ,  G06F21/6227 ,  G06F21/72 ,  H04L9/14 ,  H04L63/0428

Abstract: Systems and methods for encrypting system level data structures are described. In one embodiment, a storage system may include a storage drive and at least one controller for the storage drive. In some embodiments, the at least one controller may be configured to identify user data assigned to be stored on the storage drive, encrypt the user data, identify a system data structure generated in relation to the user data, and encrypt the system data structure. In some cases, the data structure may include at least one of metadata, system data, and data encapsulation relative to the user data. In some embodiments, the user data and the data structure may be encrypted with one or more encryption keys programmed on the storage drive.

公开(公告)号：US12086455B2

公开(公告)日：2024-09-10

申请号：US17497573

申请日：2021-10-08

Applicant: Seagate Technology LLC

Inventor： Stacey Secatch ,  David W. Claude ,  Daniel J. Benjamin ,  Thomas V. Spencer ,  Matthew B. Lovell ,  Steven Williams ,  Stephen H. Perlmutter

IPC: G06F3/06

CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0679

Abstract: A data storage system may have a plurality of memory cells located in different data storage devices that are arranged into a plurality of logical namespaces with each logical namespace configured to be sequentially written and entirely erased as a single unit. An asymmetry strategy may be proactively created with the asymmetry module in response to data access activity to the logical namespaces by the asymmetry module. A new mode, as prescribed by the asymmetry strategy, is entered for at least one logical namespace in response to an operational trigger being met. The new mode changes a timing of at least one queued data access request to at least one logical namespace.

公开(公告)号：US11994950B2

公开(公告)日：2024-05-28

申请号：US17564078

申请日：2021-12-28

Applicant: Seagate Technology LLC

Inventor： Stacey Secatch ,  Mark A. Gaertner

IPC: G06F11/00 ,  G06F11/10 ,  G06F21/60 ,  H04L9/14

CPC classification number: G06F11/1092 ,  G06F21/602 ,  H04L9/14

Abstract: Failure-domain-specific cryptographic keys for use in control of access to data within failure domains of a storage drive. A unique failure domain-specific cryptographic key may be associated with each of a plurality of failure domains in a storage drive. The failure domains may correspond to any portion of the storage media of a drive that is susceptible to failure while leaving other portions of the storage drive functional. In turn, upon detection of a condition associated with a failure (e.g., an actual or predicted failure) of a failure domain, the associated failure domain-specific cryptographic key may be deleted to preclude further access to data in the failed failure domain. Deletion of the failure domain-specific cryptographic key may be before or after data in the failed failure domain is rebuilt in another portion of a storage drive that is functional.

公开(公告)号：US20200379903A1

公开(公告)日：2020-12-03

申请号：US16947804

申请日：2020-08-18

Applicant: Seagate Technology LLC

Inventor： Stephen H. Perlmutter ,  Stacey Secatch ,  Andrew Louder

IPC: G06F12/02 ,  G06F3/06 ,  G06F11/10 ,  G11C5/06

Abstract: Apparatus and method for managing a non-volatile memory (NVM) such as a flash memory in a solid-state drive (SSD). In some embodiments, the NVM is arranged as a plurality of semiconductor memory dies coupled to a controller circuit using a plurality of channels. The controller circuit divides the plurality of dies into a succession of garbage collection units (GCUs). Each GCU is independently erasable and allocatable for storage of user data. The GCUs are staggered so that each GCU is formed from a different subset of the dies in the NVM. In further embodiments, the dies are arranged into NVM sets in accordance with the NVMe (Non-Volatile Memory Express) specification with each NVM set addressable by a different user for storage of data in a separate set of staggered GCUs.