Abstract:
A CCD linear sensor includes a monochrome sensor and a color sensor, which have different transfer speeds and which are mounted on the same chip. In the CCD linear sensor, while one read-out operation is performed by the color sensor, two read-out operations are performed by the monochrome sensor. During the second read-out period of the monochrome sensor, by stopping the generation of two-phase transfer pulses to be supplied to the transfer registers of the color sensors during a predetermined period of time before and after the second read-out pulse occurs, the transfer operation of the transfer registers of the color sensors is stopped.
Abstract:
A solid state image pickup device being provided with a photoelectric converter portion being composed of a plurality of pixels disposed in a row, a charge transfer portion for transferring the charges generated in the photoelectric converter portion, and a charge/voltage converter portion for converting the charges transferred by the charge transfer portion into voltages, comprising; a timing pulse generator portion for generating at least more than one pulse signal from among the followings: a first pulse signal for driving the charge transfer portion, a second pulse signal for reading out the charges generated in the photoelectric converter portion, a third pulse signal for sweeping out the charges generated in the photoelectric converter portion and a fourth pulse signal for discharging the charges transferred to the charge/voltage converter portion, and a switch circuit for switching over at least one pulse signal out of the abovementioned pulse signals to a predetermined fixed potential or a floating level.
Abstract:
A solid state image pickup device being provided with a photoelectric converter portion being composed of a plurality of pixels disposed in a row, a charge transfer portion for transferring the charges generated in the photoelectric converter portion, and a charge/voltage converter portion for converting the charges transferred by the charge transfer portion into voltages, comprising; a timing pulse generator portion for generating at least more than one pulse signal from among the followings: a first pulse signal for driving the charge transfer portion, a second pulse signal for reading out the charges generated in the photoelectric converter portion, a third pulse signal for sweeping out the charges generated in the photoelectric converter portion and a fourth pulse signal for discharging the charges transferred to the charge/voltage converter portion, and a switch circuit for switching over at least one pulse signal out of the abovementioned pulse signals to a predetermined fixed potential or a floating level.
Abstract:
A linear image sensor device with at least two lines including linear sensors 10, 20, which device is capable of showing a wide dynamic range. In the linear image sensor device, one linear sensor 10 is made to have a high sensitivity, while the other linear sensor 20 is made to have a low sensitivity. The linear sensors are respectively equipped with readout gates 13, 23 for reading out charges from sensor arrays 12, 22 comprising a number of pixels and CCD analog shift registers 14, 24 for transferring the charges read out. In the other linear sensor 20, analog memories 29a, 29b are provided between the readout gate 23 and the CCD analog shift register 24. Owing to the provision of the analog memories 29a, 29b, the signal outputs OUT1, OUT2 simultaneously occur, which can eliminate a problem coming from the difference in position between the lines.
Abstract:
A MOS transistor comprising channel stoppers formed of a first polysilicon layer to determine a channel width, and a gate electrode formed of a second polysilicon layer, wherein a bias voltage is applied to the channel stoppers. In a charge detector having a source follower circuit with a drive MOS transistor and a load MOS transistor for converting a transferred signal charge into a signal voltage, the MOS transistor of the invention is used as the drive transistor, and its source output voltage is fed back as a bias voltage to the channel stoppers, thereby minimizing both the DC bias variation in the output voltage of the source follower circuit and the nonuniformity in the conversion efficiency.
Abstract:
An image input device or a solid-state image sensing device using a CCD linear sensor includes a main sensor array and a sub sensor array. A transfer register for the sub sensor array is provided with charge sweep means for sweeping away unnecessary charges. Thus, only signals in the main sensor array are selectively read out without being affected by signals in the sub sensor array.
Abstract:
A solid state image pickup device being provided with a photoelectric converter portion being composed of a plurality of pixels disposed in a row, a charge transfer portion for transferring the charges generated in the photoelectric converter portion, and a charge/voltage converter portion for converting the charges transferred by the charge transfer portion into voltages, comprising; a timing pulse generator portion for generating at least more than one pulse signal from among the followings: a first pulse signal for driving the charge transfer portion, a second pulse signal for reading out the charges generated in the photoelectric converter portion, a third pulse signal for sweeping out the charges generated in the photoelectric converter portion and a fourth pulse signal for discharging the charges transferred to the charge/voltage converter portion, and a switch circuit for switching over at least one pulse signal out of the abovementioned pulse signals to a predetermined fixed potential or a floating level.
Abstract:
A solid-state image pickup device includes image pickup means having at least two sensor arrays disposed so as to be adjacent to each other, and horizontal charge transfer means having at least two horizontal registers which are disposed so as to be adjacent to the image pickup means and provided in association with the at least two sensor arrays respectively. A method of driving the solid-state image pickup device transfers the charges picked up at the respective pixels of the sensor arrays to the corresponding horizontal registers. After all the charges picked up at the respective pixels of the sensor arrays are transferred to the horizontal registers, the charges are successively transferred in the horizontal direction.
Abstract:
The present invention intends to improve a difference between signal levels of odd-numbered pixels and even-numbered pixels in a CCD (charge coupled device) linear sensor. In a CCD linear sensor comprising a sensor region (1) having an array of a plurality of sensor elements (pixels) (S.sub.1), (S.sub.2), . . . and first and second horizontal transfer registers (4) and (5) disposed on the respective sides of the sensor region (1) through read-out gate sections (2) and (3) wherein signal charges of every other sensor elements (S.sub.1), (S.sub.3), (S.sub.5), . . . are transferred by the first horizontal transfer register (4) while signal charges of remaining every other sensor elements (S.sub.2), (S.sub.4), (S.sub.6) are transferred by the second horizontal transfer register (5), the first and second horizontal transfer registers (4) and (5) include first and second transfer electrodes (22R.sub.1), (22R.sub.2) to which two-phase drive pulses (.phi.H.sub.1) and (.phi.H.sub.2) are applied, respectively and electrode configurations at the read-out gate section side are formed substantially the same, whereby the capacity of a first transfer section (HR.sub.1) to which the drive pulse (.phi.H.sub.1) is applied is made equal to that of a second transfer section (HR.sub.2) to which the drive pulse (.phi.H.sub.2) is applied.
Abstract:
A charge transfer device formed on a semiconductor substrate comprising: a charge transfer section formed on the semiconductor substrate for transferring charges, a floating gate having a floating gate diffusion layer formed on the semiconductor substrate for accumulating the charges transferred from the charge transfer section, an output gate section formed between the charge transfer section and the floating gate on the semiconductor substrate, and a charge detecting circuit electrically connected to the floating gate for outputting a voltage corresponding to the amount of the charges accumulated in the floating gate diffusion layer, the output gate section having a first output gate region adjacent to the charge transfer means and a second output gate region adjacent to the floating gate diffusion layer, the first output gate region having a first output gate electrode formed thereon with an insulating film therebetween, the second output gate region having a second output gate electrode formed thereon with an insulating film therebetween, a dc voltage being applied to the gate electrode, and an output voltage being applied to the second output gate electrode from the charging detecting circuit.