公开(公告)号：US20210217860A1

公开(公告)日：2021-07-15

申请号：US17141513

申请日：2021-01-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ryong HA ,  Dongwoo KIM ,  Gyeom KIM ,  Yong Seung KIM ,  Pankwi PARK ,  Seung Hun LEE

IPC: H01L29/417 ,  H01L29/10 ,  H01L29/423

Abstract: A semiconductor device including an active pattern extending in a first direction; a channel pattern on the active pattern and including vertically stacked semiconductor patterns; a source/drain pattern in a recess in the active pattern; a gate electrode on the active pattern and extending in a second direction crossing the first direction, the gate electrode surrounding a top surface, at least one side surface, and a bottom surface of each of the semiconductor patterns; and a gate spacer covering a side surface of the gate electrode and having an opening to the semiconductor patterns, wherein the source/drain pattern includes a buffer layer covering inner sides of the recess, the buffer layer includes an outer side surface and an inner side surface, which are opposite to each other, and each of the outer and inner side surfaces is a curved surface that is convexly curved toward a closest gate electrode.

公开(公告)号：US20230326985A1

公开(公告)日：2023-10-12

申请号：US18201308

申请日：2023-05-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ryong HA ,  Dongwoo KIM ,  Gyeom KIM ,  Yong Seung KIM ,  Pankwi PARK ,  Seung Hun LEE

IPC: H01L29/423 ,  H01L29/417 ,  H01L29/10

CPC classification number: H01L29/41758 ,  H01L29/1033 ,  H01L29/42356

Abstract: A semiconductor device including an active pattern extending in a first direction; a channel pattern on the active pattern and including vertically stacked semiconductor patterns; a source/drain pattern in a recess in the active pattern; a gate electrode on the active pattern and extending in a second direction crossing the first direction, the gate electrode surrounding a top surface, at least one side surface, and a bottom surface of each of the semiconductor patterns; and a gate spacer covering a side surface of the gate electrode and having an opening to the semiconductor patterns, wherein the source/drain pattern includes a buffer layer covering inner sides of the recess, the buffer layer includes an outer side surface and an inner side surface, which are opposite to each other, and each of the outer and inner side surfaces is a curved surface that is convexly curved toward a closest gate electrode.

公开(公告)号：US20230056095A1

公开(公告)日：2023-02-23

申请号：US17734564

申请日：2022-05-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Nam Kyu CHO ,  Sang Gil LEE ,  Seok Hoon KIM ,  Yong Seung KIM ,  Jung Taek KIM ,  Pan Kwi PARK ,  Dong Suk SHIN ,  Si Hyung LEE ,  Yang XU

IPC: H01L29/778 ,  H01L29/78 ,  H01L29/423

Abstract: A semiconductor device includes a substrate including a first region and a second region, a first active pattern on the first region, a first gate structure having a first width in the first direction, on the first active pattern, a first epitaxial pattern disposed in the first active pattern on a side surface of the first gate structure, a second active pattern on the second region, a second gate structure having a second width greater than the first width in the first direction, on the second active pattern and a second epitaxial pattern disposed in the second active pattern on a side surface of the second gate structure. Each of the first epitaxial pattern and the second epitaxial pattern includes silicon germanium (SiGe), and a first Ge concentration of the first epitaxial pattern is lower than a second Ge concentration of the second epitaxial pattern.

公开(公告)号：US20210408300A1

公开(公告)日：2021-12-30

申请号：US17470341

申请日：2021-09-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Moon Seung YANG ,  Eun Hye CHOI ,  Seung Mo KANG ,  Yong Seung KIM ,  Jung Taek KIM ,  Min-Hee CHOI

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/66 ,  H01L21/02 ,  H01L29/423

Abstract: A semiconductor device includes a fin-type pattern on a substrate, the fin-type pattern extending in a first direction and protruding from the substrate in a third direction, a first wire pattern on the fin-type pattern, the first wire pattern being spaced apart from the fin-type pattern in the third direction, and a gate electrode extending in a second direction, which is perpendicular to the first and third directions, and surrounding the first wire pattern, the gate electrode including a first portion that overlaps with the fin-type pattern in the second direction and a second portion corresponding to a remainder of the gate electrode except for the first portion.

公开(公告)号：US20240332424A1

公开(公告)日：2024-10-03

申请号：US18740736

申请日：2024-06-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yang XU ,  Nam Kyu CHO ,  Seok Hoon KIM ,  Yong Seung KIM ,  Pan Kwi PARK ,  Dong Suk SHIN ,  Sang Gil LEE ,  Si Hyung LEE

IPC: H01L29/78 ,  H01L27/088 ,  H01L29/06 ,  H01L29/417

CPC classification number: H01L29/7851 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/41791

Abstract: A semiconductor device including first fin-shaped patterns in a first region of a substrate and spaced apart from each other in a first direction, second fin-shaped patterns in a second region of the substrate and spaced apart from each other in a second direction, a first field insulating film on the substrate and covering sidewalls of the first fin-shaped patterns, a second field insulating film on the substrate and covering sidewalls of the second fin-shaped patterns, a first source/drain pattern on the first field insulating film, connected to the first fin-shaped patterns, and including a first silicon-germanium pattern, and a second source/drain pattern on the second field insulating film, connected to the second fin-shaped patterns, and including a second silicon-germanium pattern, the second source/drain pattern and the second field insulating film defining one or more first air gaps therebetween may be provided.

公开(公告)号：US20230058991A1

公开(公告)日：2023-02-23

申请号：US17690178

申请日：2022-03-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yang XU ,  Nam Kyu CHO ,  Seok Hoon KIM ,  Yong Seung KIM ,  Pan Kwi PARK ,  Dong Suk SHIN ,  Sang Gil LEE ,  Si Hyung LEE

IPC: H01L29/78 ,  H01L27/088 ,  H01L29/417 ,  H01L29/06

Abstract: A semiconductor device including first fin-shaped patterns in a first region of a substrate and spaced apart from each other in a first direction, second fin-shaped patterns in a second region of the substrate and spaced apart from each other in a second direction, a first field insulating film on the substrate and covering sidewalls of the first fin-shaped patterns, a second field insulating film on the substrate and covering sidewalls of the second fin-shaped patterns, a first source/drain pattern on the first field insulating film, connected to the first fin-shaped patterns, and including a first silicon-germanium pattern, and a second source/drain pattern on the second field insulating film, connected to the second fin-shaped patterns, and including a second silicon-germanium pattern, the second source/drain pattern and the second field insulating film defining one or more first air gaps therebetween may be provided.