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公开(公告)号:US10049882B1
公开(公告)日:2018-08-14
申请号:US15414913
申请日:2017-01-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Won Woong Chung , Sun hye Hwang , Youn Joung Cho , Jung Sik Choi , Xiaobing Zhou , Brian David Rekken , Byung Keun Hwang , Michael David Telgenhoff
Abstract: A method for fabricating a semiconductor device includes forming a structure with a height difference on a substrate and forming a dielectric layer structure on the structure using an atomic layer deposition (ALD) method. Forming the dielectric layer structure includes forming a first dielectric layer including silicon nitride on the structure with the height difference. Forming the first dielectric layer includes feeding a first gas including pentachlorodisilane (PCDS) or diisopropylamine pentachlorodisilane (DPDC) as a silicon precursor, and a second gas including nitrogen components into a chamber including the substrate such that the first dielectric layer is formed in situ on the structure having the height difference.
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公开(公告)号:US09812329B2
公开(公告)日:2017-11-07
申请号:US15291268
申请日:2016-10-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Won Woong Chung , Youn Joung Cho , Jung Sik Choi
IPC: H01L21/285 , H01L21/786 , H01L21/8238 , H01L21/768
CPC classification number: H01L21/28518 , H01L21/2855 , H01L21/76843 , H01L21/76895 , H01L21/823814 , H01L21/823871 , H01L21/823878 , H01L23/485 , H01L29/66515 , H01L29/66545 , H01L29/78
Abstract: There is provides a method of fabricating a semiconductor device to decrease contact resistance of source/drain regions and gate electrodes and thereby improve operation performance. The method includes providing an exposed silicon region, forming a rare earth metal silicide film on the exposed silicon region, the rare earth metal silicide film contacting the silicon region, and forming a contact on the rare earth metal silicide film, the contact being electrically connected to the exposed silicon region, wherein the rare earth metal silicide film is formed by simultaneously supplying a rare earth metal and silicon to the exposed silicon region using physical vapor deposition.
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