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公开(公告)号:US20230307545A1
公开(公告)日:2023-09-28
申请号:US18204469
申请日:2023-06-01
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sung Uk JANG , Young Dae CHO , Ki Hwan KIM , Su Jin JUNG
IPC: H01L29/78 , H01L29/08 , H01L29/786 , H01L29/423
CPC classification number: H01L29/7851 , H01L29/0847 , H01L29/78696 , H01L29/42392
Abstract: A semiconductor device includes an active region extending in a first direction on a substrate, channel layers on the active region and spaced apart vertically, a gate structure intersecting the active region and the channel layers, the gate structure extending in a second direction and surrounding the channel layers, and a source/drain region on the active region at a side of the gate structure, the source/drain region contacting the channel layers, the source/drain region including first epitaxial layers having a first composition and including first layers on side surfaces of the channel layers and a second layer on the active region at a lower end of the source/drain region, and a second epitaxial layer having a second composition different from the first composition, the second epitaxial layer being between the first epitaxial layers in the first direction and being between the first epitaxial layers vertically in a third direction.
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公开(公告)号:US20250022959A1
公开(公告)日:2025-01-16
申请号:US18901222
申请日:2024-09-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sung Uk JANG , Young Dae CHO , Ki Hwan KIM , Su Jin JUNG
IPC: H01L29/78 , H01L29/08 , H01L29/423 , H01L29/786
Abstract: A semiconductor device includes an active region extending in a first direction on a substrate, channel layers on the active region and spaced apart vertically, a gate structure intersecting the active region and the channel layers, the gate structure extending in a second direction and surrounding the channel layers, and a source/drain region on the active region at a side of the gate structure, the source/drain region contacting the channel layers, the source/drain region including first epitaxial layers having a first composition and including first layers on side surfaces of the channel layers and a second layer on the active region at a lower end of the source/drain region, and a second epitaxial layer having a second composition different from the first composition, the second epitaxial layer being between the first epitaxial layers in the first direction and being between the first epitaxial layers vertically in a third direction.
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公开(公告)号:US20240145474A1
公开(公告)日:2024-05-02
申请号:US18314484
申请日:2023-05-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kyung ho KIM , Myung Il KANG , Sung Uk JANG , Kyung Hee CHO , Do Young CHOI
IPC: H01L27/092 , H01L21/822 , H01L21/8238 , H01L29/06 , H01L29/417 , H01L29/423 , H01L29/66 , H01L29/775
CPC classification number: H01L27/0922 , H01L21/8221 , H01L21/823807 , H01L21/823878 , H01L29/0673 , H01L29/41733 , H01L29/42392 , H01L29/66439 , H01L29/66545 , H01L29/775
Abstract: A semiconductor device includes a substrate, a first active pattern disposed on the substrate, a second active pattern stacked on the first active pattern, a first gate structure extending to intersect the first active pattern and the second active pattern, a second gate structure spaced apart from the first gate structure and extending to intersect the first active pattern and the second active pattern, a first epitaxial pattern interposed between the first gate structure and the second gate structure, and connected to the first active pattern, a second epitaxial pattern interposed between the first gate structure and the second gate structure, and connected to the second active pattern, an insulating pattern interposed between the first epitaxial pattern and the second epitaxial pattern, and a semiconductor film interposed between the insulating pattern and the second epitaxial pattern, the semiconductor film extending along a top surface of the insulating pattern.
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公开(公告)号:US20220102497A1
公开(公告)日:2022-03-31
申请号:US17546326
申请日:2021-12-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sung Uk JANG , Seung Hun LEE , Su Jin JUNG , Young Dae CHO
IPC: H01L29/08 , H01L29/786 , H01L29/167 , H01L29/66 , H01L29/417 , H01L29/423
Abstract: A semiconductor device including an active region defined in a substrate; at least one channel layer on the active region; a gate electrode intersecting the active region and on the active region and surrounding the at least one channel layer; and a pair of source/drain regions adjacent to both sides of the gate electrode, on the active region, and in contact with the at least one channel layer, wherein the pair of source/drain regions includes a selective epitaxial growth (SEG) layer, and a maximum width of each of the pair of source/drain regions in a first direction is 1.3 times or less a width of the active region in the first direction.
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公开(公告)号:US20200152740A1
公开(公告)日:2020-05-14
申请号:US16386459
申请日:2019-04-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sung Uk JANG , Seung Hun LEE , Su Jin JUNG , Young Dae CHO
IPC: H01L29/08 , H01L29/786 , H01L29/423 , H01L29/66 , H01L29/417 , H01L29/167
Abstract: A semiconductor device including an active region defined in a substrate; at least one channel layer on the active region; a gate electrode intersecting the active region and on the active region and surrounding the at least one channel layer; and a pair of source/drain regions adjacent to both sides of the gate electrode, on the active region, and in contact with the at least one channel layer, wherein the pair of source/drain regions includes a selective epitaxial growth (SEG) layer, and a maximum width of each of the pair of source/drain regions in a first direction is 1.3 times or less a width of the active region in the first direction.
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公开(公告)号:US20240421232A1
公开(公告)日:2024-12-19
申请号:US18586125
申请日:2024-02-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Suk YANG , Sung-Hwan JANG , Do Hee KIM , Jin Bum KIM , Sung Uk JANG , Inhae ZOH
IPC: H01L29/786 , H01L29/06 , H01L29/423 , H01L29/66 , H01L29/78
Abstract: A semiconductor device includes a lower pattern extending in a first direction, a plurality of wire patterns spaced apart from the lower pattern in a second direction on the lower pattern, and a gate electrode surrounding the plurality of wire patterns and extending in a third direction, on the lower pattern. Each of the plurality of wire patterns includes a transition metal dichalcogenide (TMD) material. Each of the plurality of wire patterns includes a pair of first areas protruding from sidewalls of the gate electrode in the first direction and a second area between the first areas. A phase of the first area is different from a phase of the second area.
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公开(公告)号:US20240063306A1
公开(公告)日:2024-02-22
申请号:US18498901
申请日:2023-10-31
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Su Jin JUNG , Ki Hwan KIM , Sung Uk JANG , Young Dae CHO
IPC: H01L29/786 , H01L21/02 , H01L29/06 , H01L29/423 , H01L29/66
CPC classification number: H01L29/78618 , H01L21/0259 , H01L29/0665 , H01L29/42392 , H01L29/66545 , H01L29/66553 , H01L29/66742 , H01L29/78696
Abstract: A semiconductor device is provided. The semiconductor comprises an active pattern including a lower pattern and a plurality of sheet patterns that are spaced apart from the lower pattern in a first direction, a source/drain pattern on the lower pattern and in contact with the plurality of sheet patterns, and a gate structure on opposing sides of the source/drain pattern in a second direction different from the first direction, the gate structure including a gate electrode on the plurality of sheet patterns, wherein the source/drain pattern includes an epitaxial region that comprises a semiconductor material and a cavity region that is inside the epitaxial region and that is surrounded by the semiconductor material.
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公开(公告)号:US20220157990A1
公开(公告)日:2022-05-19
申请号:US17587402
申请日:2022-01-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sung Uk JANG , Ki Hwan KIM , Su Jin JUNG , Bong Soo KIM , Young Dae CHO
IPC: H01L29/78 , H01L29/66 , H01L29/08 , H01L29/06 , H01L29/423 , H01L29/786 , H01L21/02 , H01L29/24
Abstract: A semiconductor device including an active region extending in a first direction on a substrate; a gate structure intersecting the active region and extending in a second direction on the substrate; and a source/drain region on the active region and at least one side of the gate structure, wherein the source/drain region includes a plurality of first epitaxial layers spaced apart from each other in the first direction, the plurality of first epitaxial layers including first impurities of a first conductivity type; and a second epitaxial layer filling a space between the plurality of first epitaxial layers, the second epitaxial layer including second impurities of the first conductivity type.
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公开(公告)号:US20210296499A1
公开(公告)日:2021-09-23
申请号:US17337759
申请日:2021-06-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sung Uk JANG , Young Dae CHO , Ki Hwan KIM , Su Jin JUNG
IPC: H01L29/78 , H01L29/08 , H01L29/786 , H01L29/423
Abstract: A semiconductor device includes an active region extending in a first direction on a substrate, channel layers on the active region and spaced apart vertically, a gate structure intersecting the active region and the channel layers, the gate structure extending in a second direction and surrounding the channel layers, and a source/drain region on the active region at a side of the gate structure, the source/drain region contacting the channel layers, the source/drain region including first epitaxial layers having a first composition and including first layers on side surfaces of the channel layers and a second layer on the active region at a lower end of the source/drain region, and a second epitaxial layer having a second composition different from the first composition, the second epitaxial layer being between the first epitaxial layers in the first direction and being between the first epitaxial layers vertically in a third direction.
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公开(公告)号:US20200220018A1
公开(公告)日:2020-07-09
申请号:US16708717
申请日:2019-12-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sung Uk JANG , Young Dae CHO , Ki Hwan KIM , Su Jin JUNG
IPC: H01L29/78 , H01L29/423 , H01L29/786 , H01L29/08
Abstract: A semiconductor device includes an active region extending in a first direction on a substrate, channel layers on the active region and spaced apart vertically, a gate structure intersecting the active region and the channel layers, the gate structure extending in a second direction and surrounding the channel layers, and a source/drain region on the active region at a side of the gate structure, the source/drain region contacting the channel layers, the source/drain region including first epitaxial layers having a first composition and including first layers on side surfaces of the channel layers and a second layer on the active region at a lower end of the source/drain region, and a second epitaxial layer having a second composition different from the first composition, the second epitaxial layer being between the first epitaxial layers in the first direction and being between the first epitaxial layers vertically in a third direction.
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