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公开(公告)号:US10483373B2
公开(公告)日:2019-11-19
申请号:US16039371
申请日:2018-07-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sun-Ki Min
IPC: H01L29/76 , H01L29/66 , H01L23/532 , H01L21/762 , H01L29/423 , H01L21/033 , H01L29/06 , H01L21/28 , H01L29/78 , H01L29/49 , H01L29/51
Abstract: A semiconductor device including a first insulating interlayer on a substrate; a second insulating interlayer on the first insulating interlayer; a gate structure extending through the first insulating interlayer and the second insulating interlayer on the substrate, a lower portion of the gate structure having a first width, and an upper portion of the gate structure having a second width that is greater than the first width and that gradually increases from a bottom toward a top thereof; and a spacer structure on a sidewall of the gate structure, a width of an upper portion of the spacer structure being less than a width of a lower portion of the spacer structure.
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公开(公告)号:US10818657B2
公开(公告)日:2020-10-27
申请号:US15233123
申请日:2016-08-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sun-Ki Min , Koung-Min Ryu , Sang-Koo Kang
IPC: H01L27/088 , H01L29/78 , H01L29/423 , H01L21/8234
Abstract: There is provided a semiconductor device capable of adjusting profiles of a gate electrode and a gate spacer using a hybrid interlayer insulating film. The semiconductor device includes a gate electrode on a substrate, a gate spacer being on a sidewall of the gate electrode and including an upper portion and a lower portion, a lower interlayer insulating film being on the substrate and overlapping with the lower portion of the gate spacer, and an upper interlayer insulating film being on the lower interlayer insulating film and overlapping with the upper portion of the gate spacer, wherein the lower interlayer insulating film is not interposed between the upper interlayer insulating film and the upper portion of the gate spacer.
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公开(公告)号:US10186615B2
公开(公告)日:2019-01-22
申请号:US15889803
申请日:2018-02-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sung-Soo Kim , Gi-Gwan Park , Song-E Kim , Koung-Min Ryu , Sun-Ki Min
IPC: H01L29/78 , H01L29/06 , H01L29/417
Abstract: A semiconductor device is provided which includes a first fin-type pattern including a first side surface and a second side surface opposite to each other, a first trench of a first depth adjacent to the first side surface, a second trench of a second depth adjacent to the second side surface. The second depth differs from the first depth, and a first field insulating film partially fills the first trench and a second field insulating film partially fills the second trench. The first fin-type pattern has a lower portion, and an upper portion having a narrower width than the lower portion, and has a first stepped portion on a boundary between the upper portion and the lower portion. The first field insulating film includes a first lower field insulating film in contact with the lower portion, and a first upper field insulating film in contact with the upper portion.
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公开(公告)号:US10109738B2
公开(公告)日:2018-10-23
申请号:US15812527
申请日:2017-11-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sung-soo Kim , Song-E Kim , Koung-Min Ryu , Sun-Ki Min
Abstract: A semiconductor device is provided that includes a deep trench defining an active region, and a fin-type pattern protruding within the active region. The fin-type pattern having a lower portion, an upper portion of a narrower width than the lower portion, and a first stepped portion formed at a boundary between the upper portion and the lower portion. The device also includes a first field insulating film surrounding the lower portion and a second field insulating film formed on the first field insulating film and partially surrounding the upper portion.
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公开(公告)号:US20180102429A1
公开(公告)日:2018-04-12
申请号:US15812527
申请日:2017-11-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sung-soo KIM , Song-E KIM , Koung-Min RYU , Sun-Ki Min
CPC classification number: H01L29/785 , H01L27/1233 , H01L29/66795 , H01L29/7846 , H01L29/7854
Abstract: A semiconductor device is provided that includes a deep trench defining an active region, and a fin-type pattern protruding within the active region. The fin-type pattern having a lower portion, an upper portion of a narrower width than the lower portion, and a first stepped portion formed at a boundary between the upper portion and the lower portion. The device also includes a first field insulating film surrounding the lower portion and a second field insulating film formed on the first field insulating film and partially surrounding the upper portion.
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公开(公告)号:US09847421B2
公开(公告)日:2017-12-19
申请号:US15189960
申请日:2016-06-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sung-soo Kim , Song-E Kim , Koung-Min Ryu , Sun-Ki Min
CPC classification number: H01L29/785 , H01L27/1233 , H01L29/66795 , H01L29/7846 , H01L29/7854
Abstract: A semiconductor device is provided that includes a deep trench defining an active region, and a fin-type pattern protruding within the active region. The fin-type pattern having a lower portion, an upper portion of a narrower width than the lower portion, and a first stepped portion formed at a boundary between the upper portion and the lower portion. The device also includes a first field insulating film surrounding the lower portion and a second field insulating film formed on the first field insulating film and partially surrounding the upper portion.
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公开(公告)号:US20170117192A1
公开(公告)日:2017-04-27
申请号:US15215951
申请日:2016-07-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sun-Ki Min , Gi-Gwan PARK , Sang-Koo KANG , Sung-Sao KIM , Ju-Youn KIM , Koung-Min RYU , Jae-Hoon LEE , Tae-Won HA
IPC: H01L21/8238 , H01L29/78 , H01L27/092
CPC classification number: H01L21/823864 , H01L21/28114 , H01L21/823807 , H01L21/823821 , H01L21/823842 , H01L21/82385 , H01L27/092 , H01L27/0924 , H01L29/0653 , H01L29/42376 , H01L29/7854
Abstract: A semiconductor device may include a first gate electrode being formed on a substrate and having a first ratio of a width of an upper surface to a width of a lower surface, a second gate electrode being formed on the substrate and having a second ratio of the width of the upper surface to the width of the lower surface, wherein the second ratio is less than the first ratio, a first gate spacer being formed on a sidewall of the first gate electrode, a second gate spacer being formed on a sidewall of the second gate electrode and an interlayer insulating film covering the first gate spacer and the second gate spacer.
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公开(公告)号:US20170054020A1
公开(公告)日:2017-02-23
申请号:US15189960
申请日:2016-06-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sung-soo KIM , Koung-Min RYU , Sun-Ki Min
IPC: H01L29/78 , H01L29/06 , H01L23/535
CPC classification number: H01L29/785 , H01L27/1233 , H01L29/66795 , H01L29/7846 , H01L29/7854
Abstract: A semiconductor device is provided that includes a deep trench defining an active region, and a fin-type pattern protruding within the active region. The fin-type pattern having a lower portion, an upper portion of a narrower width than the lower portion, and a first stepped portion formed at a boundary between the upper portion and the lower portion. The device also includes a first field insulating film surrounding the lower portion and a second field insulating film formed on the first field insulating film and partially surrounding the upper portion.
Abstract translation: 提供一种半导体器件,其包括限定有源区的深沟槽和在有源区域内突出的鳍型图案。 翅片型图案具有下部,比下部更窄的上部,以及形成在上部和下部之间的边界处的第一阶梯部。 该器件还包括围绕下部的第一场绝缘膜和形成在第一场绝缘膜上并部分围绕上部的第二场绝缘膜。
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