公开(公告)号：US20240030083A1

公开(公告)日：2024-01-25

申请号：US18187444

申请日：2023-03-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yikoan HONG ,  Seokho KIM ,  Kwangjin MOON

IPC: H01L23/34 ,  H01L25/065 ,  H01L23/00

CPC classification number: H01L23/34 ,  H01L25/0657 ,  H01L24/08 ,  H01L2224/08146 ,  H01L2224/08221 ,  H01L2924/182

Abstract: A semiconductor package includes a semiconductor substrate and a semiconductor chip in contact with the semiconductor substrate. The semiconductor chip has a first surface facing the semiconductor substrate and an opposite second surface. The semiconductor chip has a die region, an edge region extending around the die region and a plurality of air exhaust passages extending from the die region to an outer surface of the edge region in the first surface of the semiconductor chip. Each of the air exhaust passages includes an inlet having a first passage area, and an outlet having a second passage area greater than the first passage area.

公开(公告)号：US20180122845A1

公开(公告)日：2018-05-03

申请号：US15602185

申请日：2017-05-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun Hyung KIM ,  Seokho KIM ,  SungHyup KIM ,  Jaegeun KIM ,  Taeyeong KIM

IPC: H01L27/146

CPC classification number: H01L27/1469 ,  H01L21/2007 ,  H01L24/01 ,  H01L24/03 ,  H01L24/04 ,  H01L24/74 ,  H01L24/80 ,  H01L27/14634 ,  H01L27/14683 ,  H01L27/14687

Abstract: Disclosed are a substrate bonding apparatus and a method of manufacturing a semiconductor device. The substrate bonding apparatus comprises vacuum pumps, a first chuck engaged with the vacuum pumps and adsorbing a first substrate at vacuum pressure of the vacuum pumps, and a pushing unit penetrating a center of the first chuck and pushing the first substrate away from the first chuck. The first chuck comprises adsorption sectors providing different vacuum pressures in an azimuth direction to the first substrate.

公开(公告)号：US20250038141A1

公开(公告)日：2025-01-30

申请号：US18916136

申请日：2024-10-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joohee JANG ,  Seokho KIM ,  Hoonjoo NA ,  Jaehyung PARK ,  Kyuha LEE

IPC: H01L23/00 ,  H01L27/146

Abstract: A method includes forming a first substrate including a first dielectric layer and a first metal pad, forming a second substrate including a second dielectric layer and a second metal pad, and bonding the first dielectric layer to the second dielectric layer, and the first metal pad to the second metal pad. One or both of the first and second substrates is formed by forming a first insulating layer, forming an opening in the layer, forming a barrier on an inner surface of the opening, forming a metal pad material on the barrier, polishing the metal pad material to expose a portion of the barrier and to form a gap, expanding the gap, forming a second insulating layer to fill the opening and the gap, and polishing the insulating layers such that a top surface of the metal pad is substantially planar with an upper surface of the polished layer.

公开(公告)号：US20240312935A1

公开(公告)日：2024-09-19

申请号：US18467199

申请日：2023-09-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joo Hee JANG ,  Kwangjin MOON ,  Seokho KIM ,  Soonwook KIM ,  Kunsang PARK

IPC: H01L23/00 ,  H10B80/00

CPC classification number: H01L24/08 ,  H01L24/80 ,  H10B80/00 ,  H01L2224/08145 ,  H01L2224/80895 ,  H01L2224/80896

Abstract: A bonding semiconductor device according to at least one embodiment is formed by bonding a first chip and a second chip, and includes a chip region and a partition region. A bonding pad formed by bonding a first bonding pad of the first chip and a second bonding pad of the second chip may be provided in the chip region. A separation pattern portion in which a first base layer of a first pattern portion of the first chip and a second base layer of a second pattern portion of the second chip are entirely separated from each other to have an inner space may be provided in the partition region.

公开(公告)号：US20240234377A9

公开(公告)日：2024-07-11

申请号：US18536332

申请日：2023-12-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinnam KIM ,  Seokho KIM ,  Hoonjoo NA ,  Kwangjin MOON

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/48 ,  H01L25/18

CPC classification number: H01L25/0657 ,  H01L23/481 ,  H01L24/05 ,  H01L24/08 ,  H01L24/16 ,  H01L24/48 ,  H01L25/18 ,  H01L2224/05147 ,  H01L2224/08145 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2225/06541

Abstract: A semiconductor package includes a first structure including a first semiconductor chip comprising a first semiconductor integrated circuit, and a second structure on the first structure. The second structure includes a second semiconductor chip including a second semiconductor integrated circuit, a semiconductor pattern horizontally spaced apart from the second semiconductor chip and on a side surface of the second semiconductor chip, an insulating pattern between the second semiconductor chip and the semiconductor pattern, and through-electrode structures. At least one of the through-electrode structures penetrates through at least a portion of the second semiconductor chip or penetrates through the semiconductor pattern. The semiconductor pattern has a first side surface facing the side surface of the second semiconductor chip and a second side surface opposing the first side surface. The second side surface of the semiconductor pattern is vertically aligned with a side surface of the first semiconductor chip.

公开(公告)号：US20240136334A1

公开(公告)日：2024-04-25

申请号：US18536332

申请日：2023-12-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinnam KIM ,  Seokho KIM ,  Hoonjoo NA ,  Kwangjin MOON

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/48 ,  H01L25/18

CPC classification number: H01L25/0657 ,  H01L23/481 ,  H01L24/05 ,  H01L24/08 ,  H01L24/16 ,  H01L24/48 ,  H01L25/18 ,  H01L2224/05147 ,  H01L2224/08145 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2225/06541

Abstract: A semiconductor package includes a first structure including a first semiconductor chip comprising a first semiconductor integrated circuit, and a second structure on the first structure. The second structure includes a second semiconductor chip including a second semiconductor integrated circuit, a semiconductor pattern horizontally spaced apart from the second semiconductor chip and on a side surface of the second semiconductor chip, an insulating pattern between the second semiconductor chip and the semiconductor pattern, and through-electrode structures. At least one of the through-electrode structures penetrates through at least a portion of the second semiconductor chip or penetrates through the semiconductor pattern. The semiconductor pattern has a first side surface facing the side surface of the second semiconductor chip and a second side surface opposing the first side surface. The second side surface of the semiconductor pattern is vertically aligned with a side surface of the first semiconductor chip.

公开(公告)号：US20220084199A1

公开(公告)日：2022-03-17

申请号：US17469325

申请日：2021-09-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sukyong LEE ,  Seokho KIM ,  Seunghyun KIM ,  Hangchan KIM ,  Sanghyun LEE

IPC: G06T7/00 ,  A61B5/00 ,  G01N33/52

Abstract: An electronic device and a control method of an electronic device are provided. The control method includes obtaining an image on the diagnostic kit through a camera included in the electronic device, the obtaining of the image based on receiving a user command for photographing a diagnostic kit including at least one test line discolored according to a reaction between a sample collected from a body of a user and a reagent, and a plurality of tone distinction markers with tones different from one another, obtaining a first color value on the at least one test line included in the obtained image and a second color value on each of the plurality of tone distinction markers, obtaining a first deviation information on a photographing environment of the obtained image, correcting a first data to obtain a biometric information measurement value, and obtaining a diagnostic result corresponding to the measurement value.

公开(公告)号：US20200373274A1

公开(公告)日：2020-11-26

申请号：US16783342

申请日：2020-02-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ilyoung HAN ,  Taeyeong KIM ,  Jihoon KANG ,  Nohsung KWAK ,  Seokho KIM ,  Hoechul KIM ,  Ilhyoung LEE ,  Hakjun LEE

IPC: H01L23/00 ,  H01L21/683 ,  H01L21/687 ,  H01L21/67

Abstract: A substrate bonding apparatus for bonding a first substrate to a second substrate includes: a first bonding chuck including: a first base; a first deformable plate provided on the first base to support the first substrate; and a first pneumatic adjustor configured to deform the first deformable plate by adjusting a first pressure in a first cavity formed between the first deformable plate and the first base; and a second bonding chuck including: a second base; a second deformable plate provided on the second base to support the second substrate; and a second pneumatic adjustor configured to deform the second deformable plate by adjusting a second pressure in a second cavity formed between the second deformable plate and the second base. The first deformable plate is deformed such that a first distance between the first base and the first deformable plate is varied based on the first pressure, and the second deformable plate is deformed such that a second distance between the second base the second deformable plate is varied based on the second pressure.

公开(公告)号：US20180053797A1

公开(公告)日：2018-02-22

申请号：US15630063

申请日：2017-06-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ho-Jin LEE ,  Kwangjin MOON ,  Seokho KIM ,  Sukchul BANG ,  Jin Ho AN ,  Naein LEE

IPC: H01L27/146

CPC classification number: H01L27/1463 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/14645 ,  H01L27/14683 ,  H01L2224/11

Abstract: A semiconductor device includes a semiconductor substrate with first and second surfaces facing each other, an etch stop pattern in a trench formed in the first surface of the semiconductor substrate, a first insulating layer on the first surface of the semiconductor substrate, and a through via penetrating the semiconductor substrate and the first insulating layer. The etch stop pattern surrounds a portion of a lateral surface of the through via.

公开(公告)号：US20240274593A1

公开(公告)日：2024-08-15

申请号：US18414750

申请日：2024-01-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seongmin SON ,  Seokho KIM ,  Sumin PARK ,  Kyuha LEE ,  Joohee JANG

IPC: H01L27/02 ,  H01L23/13 ,  H01L23/58 ,  H01L27/118

CPC classification number: H01L27/0207 ,  H01L23/13 ,  H01L23/585 ,  H01L2027/11875

Abstract: A semiconductor device includes a first substrate structure and a second substrate structure stacked on the first substrate structure. The first substrate structure includes a plurality of first bonding pads in a first die region of a first substrate, a first passivation layer on the first substrate and exposing the first bonding pads, and a plurality of first dummy patterns in the first passivation layer in a first scribe region. The second substrate structure includes a plurality of second bonding pads in a second die region of a second substrate, a second passivation layer on the second substrate and exposing the second bonding pads, and a plurality of second dummy patterns in the second passivation layer in a second scribe region. The first bonding pad and the second bonding pad are directly bonded to each other.