公开(公告)号：US10177160B2

公开(公告)日：2019-01-08

申请号：US15661280

申请日：2017-07-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngbeom Pyon ,  Kichul Park ,  Inkwon Kim ,  Ki Hoon Jang ,  Byoungho Kwon ,  Sangkyun Kim ,  Boun Yoon

IPC: H01L21/00 ,  H01L23/528 ,  H01L27/112 ,  H01L23/535 ,  H01L27/11551 ,  H01L27/11578 ,  H01L21/768 ,  H01L21/02 ,  H01L23/538

Abstract: A semiconductor device includes a substrate, a peripheral structure, a lower insulating layer, and a stack. The substrate includes a peripheral circuit region and a cell array region. The peripheral structure is on the peripheral circuit region. The lower insulating layer covers the peripheral circuit region and the cell array region and has a protruding portion protruding from a flat portion. The stack is on the lower insulating layer and the cell array region, and includes upper conductive patterns and insulating patterns which are alternately and repeatedly stacked.

公开(公告)号：US20190081102A1

公开(公告)日：2019-03-14

申请号：US15919639

申请日：2018-03-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kichul Park ,  Ki-Woong Kim ,  Hansol Seok ,  Byoungho Kwon ,  Boun Yoon

IPC: H01L27/22 ,  H01L23/522 ,  H01L43/08 ,  H01L43/02 ,  H01F10/32 ,  H01L23/532 ,  H01L23/528 ,  G11C11/16 ,  H01L43/12 ,  H01L21/768 ,  H01L21/027 ,  H01L21/3213

Abstract: A semiconductor memory device may include a selection transistor on a semiconductor substrate, an interlayered insulating layer covering the selection transistor, a lower contact plug coupled to a drain region of the selection transistor and configured to penetrate the interlayered insulating layer, and a magnetic tunnel junction pattern coupled to the lower contact plug. The lower contact plug may include a metal pattern and a capping metal pattern in contact with a top surface of the metal pattern. The capping metal pattern may include a top surface having a surface roughness that is smaller than a surface roughness of the top surface of the metal pattern. The magnetic tunnel junction pattern may include bottom and top electrodes, a lower magnetic layer and an upper magnetic layer between the top and bottom electrodes, and a tunnel barrier layer between the lower magnetic layer and the upper magnetic layer.

公开(公告)号：US10716755B2

公开(公告)日：2020-07-21

申请号：US16237913

申请日：2019-01-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngbeom Pyon ,  Kichul Park ,  Inkwon Kim ,  Ki Hoon Jang ,  Byoungho Kwon ,  Sangkyun Kim ,  Boun Yoon

IPC: H01L27/112 ,  H01L23/535 ,  H01L23/528 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11582 ,  H01L21/768 ,  H01L27/11551 ,  H01L27/11578 ,  H01L21/02 ,  H01L23/538 ,  A61K9/06 ,  A61K45/06 ,  A61K9/00 ,  A61K31/197 ,  A61K47/10 ,  A61K47/12 ,  A61K47/20 ,  A61K47/32 ,  A61K47/44

Abstract: A semiconductor device includes a substrate, a peripheral structure, a lower insulating layer, and a stack. The substrate includes a peripheral circuit region and a cell array region. The peripheral structure is on the peripheral circuit region. The lower insulating layer covers the peripheral circuit region and the cell array region and has a protruding portion protruding from a flat portion. The stack is on the lower insulating layer and the cell array region, and includes upper conductive patterns and insulating patterns which are alternately and repeatedly stacked.

公开(公告)号：US12255139B2

公开(公告)日：2025-03-18

申请号：US17751819

申请日：2022-05-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Anthony Dongick Lee ,  Sangcheol Na ,  Kichul Park ,  Sungyup Jung ,  Youngwoo Cho

IPC: H01L23/528 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

Abstract: A semiconductor device including a first insulating structure on a substrate and including a first etch stop layer and a first interlayer insulating layer on the first etch stop layer, a second insulating structure on the first insulating structure and including a second etch stop layer and a second interlayer insulating layer on the second etch stop layer, a conductive line penetrating through the second insulating structure, and extending in a first direction parallel to an upper surface of the substrate, and a plurality of contacts penetrating through the first insulating structure and connected to the conductive line may be provided. The conductive line may include a protrusion extending below the second insulating structure and penetrating through the first interlayer insulating layer to be in contact with the first etch stop layer.

公开(公告)号：US11563798B2

公开(公告)日：2023-01-24

申请号：US17521594

申请日：2021-11-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyungho Jeon ,  Timothy John Ebido ,  Kichul Park

IPC: G06F15/16 ,  H04L67/06 ,  H04L67/1097 ,  H04L67/01 ,  H04L67/561

Abstract: An electronic device includes a memory storing a first data set comprising a first plurality of files; a communicator comprising circuitry; and a processor configured to: identify an amount of files having a size less than a first threshold value among the first plurality of files; based on the identified amount of files and a communication state with a server, determine a size of a unit file to be transmitted to the server; convert the identified files having the size less than the first threshold value into the determined size unit, and generate metadata for the first data set while converting the identified files; and control the communicator to transmit the first data set including the converted files and the metadata for the first data set to the server.