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公开(公告)号:US20240153948A1
公开(公告)日:2024-05-09
申请号:US18415863
申请日:2024-01-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sung Soo KIM , Gi Gwan PARK , Jung Hun CHOI , Koung Min RYU , Sun Jung LEE
IPC: H01L27/088 , H01L21/8234 , H01L23/485 , H01L23/528 , H01L29/423
CPC classification number: H01L27/0886 , H01L21/823431 , H01L21/823456 , H01L21/823475 , H01L23/485 , H01L23/5283 , H01L29/42364 , H01L29/42372 , H01L27/0924
Abstract: A semiconductor device includes a substrate including a first region, and a second region, a first gate structure and a second gate structure on the substrate of the first region, a third gate structure and a fourth gate structure on the substrate of the second region, a first interlayer insulating film on the substrate of the first region and including a first lower interlayer insulating film and a first upper interlayer insulating film, a second interlayer insulating film on the substrate of the second region and including a second lower interlayer insulating film and a second upper interlayer insulating film, a first contact between the first gate structure and the second gate structure and within the first interlayer insulating film, and a second contact formed between the third gate structure and the fourth gate structure and within the second interlayer insulating film.
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公开(公告)号:US20190280081A1
公开(公告)日:2019-09-12
申请号:US16424996
申请日:2019-05-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jung Hun CHOI , Young Tak KIM , Da Il EOM , Sun Jung LEE
Abstract: A semiconductor device and a manufacturing method thereof, the semiconductor device including an insulation layer; a metal resistance pattern on the insulation layer; a spacer on a side wall of the metal resistance pattern; and a gate contact spaced apart from the spacer, the gate contact extending into the insulation layer, wherein the insulation layer includes a projection projecting therefrom, the projection contacting the gate contact.
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公开(公告)号:US20250113597A1
公开(公告)日:2025-04-03
申请号:US18978581
申请日:2024-12-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sung Soo KIM , Gi Gwan PARK , Jung Hun CHOI , Koung Min RYU , Sun Jung LEE
IPC: H01L27/088 , H01L21/8234 , H01L23/485 , H01L23/528 , H01L27/092 , H01L29/423 , H01L29/739
Abstract: A semiconductor device includes a substrate including a first region, and a second region, a first gate structure and a second gate structure on the substrate of the first region, a third gate structure and a fourth gate structure on the substrate of the second region, a first interlayer insulating film on the substrate of the first region and including a first lower interlayer insulating film and a first upper interlayer insulating film, a second interlayer insulating film on the substrate of the second region and including a second lower interlayer insulating film and a second upper interlayer insulating film, a first contact between the first gate structure and the second gate structure and within the first interlayer insulating film, and a second contact formed between the third gate structure and the fourth gate structure and within the second interlayer insulating film.
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公开(公告)号:US20170345884A1
公开(公告)日:2017-11-30
申请号:US15444455
申请日:2017-02-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jung Hun CHOI , Young Tak KIM , Da Il EOM , Sun Jung LEE
CPC classification number: H01L28/20 , H01L27/0629 , H01L29/7851
Abstract: A semiconductor device and a manufacturing method thereof, the semiconductor device including an insulation layer; a metal resistance pattern on the insulation layer; a spacer on a side wall of the metal resistance pattern; and a gate contact spaced apart from the spacer, the gate contact extending into the insulation layer, wherein the insulation layer includes a projection projecting therefrom, the projection contacting the gate contact.
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公开(公告)号:US20170141107A1
公开(公告)日:2017-05-18
申请号:US15333545
申请日:2016-10-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sung Soo KIM , Gi Gwan PARK , Jung Hun CHOI , Koung Min RYU , Sun Jung LEE
IPC: H01L27/088 , H01L29/423 , H01L23/528
Abstract: A semiconductor device includes a substrate including a first region, and a second region, a first gate structure and a second gate structure on the substrate of the first region, a third gate structure and a fourth gate structure on the substrate of the second region, a first interlayer insulating film on the substrate of the first region and including a first lower interlayer insulating film and a first upper interlayer insulating film, a second interlayer insulating film on the substrate of the second region and including a second lower interlayer insulating film and a second upper interlayer insulating film, a first contact between the first gate structure and the second gate structure and within the first interlayer insulating film, and a second contact formed between the third gate structure and the fourth gate structure and within the second interlayer insulating film.
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