公开(公告)号：US20220036954A1

公开(公告)日：2022-02-03

申请号：US17503952

申请日：2021-10-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chang-Yeon YU ,  Kui-Han KO ,  Il-Han PARK ,  June-Hong PARK ,  Joo-Yong PARK ,  Joon-Young PARK ,  Bong-Soon LIM

IPC: G11C16/10 ,  G11C16/26 ,  G11C16/04 ,  G11C16/08 ,  G11C16/24

Abstract: To program in a nonvolatile memory device including a cell region including first metal pads and a peripheral region including second metal pads and vertically connected to the cell region by the first metal pads and the second metal pads, a memory block is provided with a plurality of sub blocks disposed in a vertical direction where the memory block includes a plurality of cell strings each including a plurality of memory cells connected in series and disposed in the vertical direction. A plurality of intermediate switching transistors are disposed in a boundary portion between two adjacent sub blocks in the vertical direction. Each of the plurality of intermediate switching transistors is selectively activated based on a program address during a program operation. The selectively activating each of the plurality of intermediate switching transistors includes selectively turning on one or more intermediate switching transistors in a selected cell string based on the program address.

公开(公告)号：US20190198117A1

公开(公告)日：2019-06-27

申请号：US16141147

申请日：2018-09-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chang-Yeon YU ,  Kui-Han KO ,  Il-Han PARK ,  June-Hong PARK ,  Joo-Yong PARK ,  Joon-Young PARK ,  Bong-Soon LIM

IPC: G11C16/16 ,  G11C16/08 ,  G11C16/24 ,  G11C16/26 ,  G11C16/04

CPC classification number: G11C16/16 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/24 ,  G11C16/26 ,  H01L27/11556

Abstract: To program in a nonvolatile memory device, a memory block is provided with a plurality of sub blocks disposed in a vertical direction where the memory block includes a plurality of cell strings each including a plurality of memory cells connected in series and disposed in the vertical direction. A plurality of intermediate switching transistors are disposed in a boundary portion between two adjacent sub blocks in the vertical direction. Each of the plurality of intermediate switching transistors is selectively activated based on a program address during a program operation. The selectively activating each of the plurality of intermediate switching transistors includes selectively turning on one or more intermediate switching transistors in a selected cell string based on the program address.

公开(公告)号：US20140204680A1

公开(公告)日：2014-07-24

申请号：US14061019

申请日：2013-10-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： TaeHyun KIM ,  June-Hong PARK ,  Sungwhan SEO ,  Jinyub LEE

IPC: G11C16/30

CPC classification number: G11C16/30 ,  G11C16/0483 ,  G11C16/12

Abstract: An external power control method includes determining whether to apply a second external voltage to a first node according to a drop of a first external voltage; generating a flag signal according to a drop of the second external voltage when the second external voltage is applied to the first node; transferring a voltage of the first node to a second node in response to the flag signal; and discharging at least one voltage of an internal circuit connected to the second node in response to the flag signal.

Abstract translation: 外部功率控制方法包括根据第一外部电压的下降来确定是否向第一节点施加第二外部电压; 当第二外部电压施加到第一节点时，根据第二外部电压的下降产生标志信号; 响应于所述标志信号将所述第一节点的电压传送到第二节点; 以及响应于所述标志信号，放电连接到所述第二节点的内部电路的至少一个电压。