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公开(公告)号:US20220415915A1
公开(公告)日:2022-12-29
申请号:US17747462
申请日:2022-05-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: SUNGMIN HWANG , Jaejoo Shim , Bongtae Park , Taechul Jung , Jongyoon Choi
IPC: H01L27/11565 , H01L27/11556 , H01L27/11582 , H01L27/11519
Abstract: Semiconductor device includes a substrate, gate electrodes stacked and spaced apart from each other in a first direction perpendicular to an upper surface of the substrate, separation regions penetrating the gate electrodes, extending in a second direction perpendicular to the first direction, and spaced apart from each other in a third direction perpendicular to the first direction and the second direction, channel structures arranged in columns in the third direction and rows in the second direction and penetrating the gate electrodes between the separation regions, and bit lines extending in the third direction on the channel structures. The channel structures include a first group of channel structures repeatedly arranged and including three columns arranged with a first pitch and a second pitch smaller than the first pitch in order, and the bit lines are arranged with at least one pitch smaller than the second pitch in the second direction.
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公开(公告)号:US09711531B2
公开(公告)日:2017-07-18
申请号:US15285682
申请日:2016-10-05
Applicant: Samsung Electronics Co., Ltd.
Inventor: Woong-Seop Lee , Jongyoon Choi , Jinhyun Shin , Dong-Sik Lee
IPC: H01L29/76 , H01L27/11582 , H01L29/10 , H01L27/11568 , H01L29/04 , H01L27/11565 , H01L29/423 , H01L21/02
CPC classification number: H01L27/11582 , H01L21/0243 , H01L21/02636 , H01L27/11565 , H01L27/11568 , H01L29/04 , H01L29/1037 , H01L29/1054 , H01L29/4234 , H01L29/7827
Abstract: A method of fabricating a semiconductor device can include forming a channel hole in a vertical stack of alternating insulating and sacrificial layers to form a recess in a substrate. A selectively epitaxial growth can be performed to provide a lower semiconductor pattern in the recess using material of the substrate as a seed and a recess can be formed to penetrate an upper surface of the lower semiconductor pattern via the channel hole.
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