公开(公告)号：US20150228591A1

公开(公告)日：2015-08-13

申请号：US14559446

申请日：2014-12-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ji-Hwang KIM ,  Keum-Hee MA ,  Tae-Je CHO

IPC: H01L23/00 ,  H01L23/16 ,  H01L23/367 ,  H01L23/522

CPC classification number: H01L24/81 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/49816 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16147 ,  H01L2224/16237 ,  H01L2224/17181 ,  H01L2224/73204 ,  H01L2224/73259 ,  H01L2224/81801 ,  H01L2224/81986 ,  H01L2224/9202 ,  H01L2224/92224 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2224/81

Abstract: A semiconductor package including a chip stack structure having first and second chips that are secured to a dissipating plate by using a mold layer such that the second chip is combined to the dissipating plate and the first chip is bonded to the second chip, and the first chip has a smaller thickness than the second chip, a circuit board onto which the chip stack structure is mounted in a bonded manner, and an under-fill layer filling a gap space between the circuit board and first chip, a side surface of the under-fill layer being connected to a sidewall of the mold layer may be provided. Due to this bulk mounting structure, the warpage and bonding failures of the semiconductor package may be substantially reduced.

Abstract translation: 一种半导体封装，包括具有第一和第二芯片的芯片堆叠结构，所述芯片堆叠结构通过使用模具层固定到散热板，使得所述第二芯片组合到所述散热板并且所述第一芯片被结合到所述第二芯片，并且所述第一芯片 芯片具有比第二芯片小的厚度，以键合方式安装芯片堆叠结构的电路板，以及填充电路板和第一芯片之间的间隙空间的欠填充层，底部的侧表面 可以提供连接到模具层的侧壁的填充层。 由于该散装安装结构，可以显着地减少半导体封装的翘曲和接合故障。

公开(公告)号：US20190174087A1

公开(公告)日：2019-06-06

申请号：US16129010

申请日：2018-09-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ji-Hwang KIM ,  Hyo-Eun KIM ,  Jong-Bo SHIM ,  Cha-Jea JO ,  Sang-Uk HAN

IPC: H04N5/369 ,  H04N5/225 ,  G02B5/20 ,  H01L27/146

Abstract: A substrate structure for an image sensor module includes a module substrate including a sensor mounting hole, a reinforcing plate on a lower surface of the module substrate, an image sensor chip on the reinforcing plate within the sensor mounting hole, and a reinforcing pattern in the module substrate. The reinforcing plate covers the sensor mounting hole. An upper surface of the image sensor chip may be exposed by the module substrate. The reinforcing pattern is adjacent to the sensor mounting hole and extends in at least one direction.

公开(公告)号：US20140213017A1

公开(公告)日：2014-07-31

申请号：US13803662

申请日：2013-03-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-Youn KIM ,  Ji-Hwang KIM ,  Hae-Jung YU ,  Cha-Jea JO

IPC: H01L21/82

CPC classification number: H01L21/82 ,  H01L21/561 ,  H01L21/568 ,  H01L21/78 ,  H01L23/3135 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/03002 ,  H01L2224/03009 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/11009 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10328 ,  H01L2924/10329 ,  H01L2924/10332 ,  H01L2924/10333 ,  H01L2924/10335 ,  H01L2924/10523 ,  H01L2924/12042 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1438 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/32225 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A method of fabricating a semiconductor device includes attaching a semiconductor substrate to a carrier using a carrier fixing layer, where the semiconductor substrate including a plurality of semiconductor chips. The method further includes forming gaps between adjacent ones of the chips. The gaps may be formed using one or more chemicals or light which act to remove portions of the semiconductor substrate to expose the carrier fixing layer. Additional portions of the carrier fixing layer are then removed to allow for removal of the chips from the carrier.

Abstract translation: 制造半导体器件的方法包括：使用载体固定层将半导体衬底附着到载体上，其中半导体衬底包括多个半导体芯片。 该方法还包括在相邻芯片之间形成间隙。 可以使用一种或多种化学品或光来形成间隙，所述化学物质或光用于去除半导体衬底的部分以暴露载体固定层。 然后移除载体固定层的附加部分以允许将芯片从载体上移除。