公开(公告)号：US20190027438A1

公开(公告)日：2019-01-24

申请号：US16119475

申请日：2018-08-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Changseop YOON ,  Kwangsub YOON ,  Jongmil YOUN ,  Hyung Jong LEE

IPC: H01L23/528 ,  H01L27/02 ,  H01L23/485 ,  H01L29/06 ,  H01L21/8238

Abstract: A semiconductor device includes a substrate including PMOSFET and NMOSFET regions, a first gate structure extending in a first direction and crossing the PMOSFET and NMOSFET regions, and a gate contact on and connected to the first gate structure, the gate contact being between the PMOSFET and NMOSFET regions, the gate contact including a first sub contact in contact with a top surface of the first gate structure, the first sub contact including a vertical extending portion extending vertically toward the substrate along one sidewall of the first gate structure, and a second sub contact spaced apart from the first gate structure, a top surface of the second sub contact being positioned at a same level as a top surface of the first sub contact.

公开(公告)号：US20190267459A1

公开(公告)日：2019-08-29

申请号：US16406472

申请日：2019-05-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Deok Han BAE ,  Hyung Jong LEE ,  Hyun Jin KIM

IPC: H01L29/417 ,  H01L29/78 ,  H01L29/06 ,  H01L27/088 ,  H01L29/66 ,  H01L27/12 ,  H01L21/8234 ,  H01L27/092 ,  H01L27/11

Abstract: A semiconductor device includes a source/drain region in a fin-type active pattern, a gate structure adjacent to the source/drain region, and an insulating layer on the source/drain region and the gate structure. A shared contact plug penetrates through the insulating layer and includes a first lower portion connected to the source/drain region, a second lower portion connected to the gate structure, and an upper portion connected to upper surfaces of the first lower portion and the second lower portion. A plug spacer film is between the insulating layer and at least one of the first lower portion and the second lower portion and includes a material different from a material of the insulating layer.

公开(公告)号：US20180005943A1

公开(公告)日：2018-01-04

申请号：US15704049

申请日：2017-09-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Changseop YOON ,  Kwangsub YOON ,  Jongmil YOUN ,  Hyung Jong LEE

IPC: H01L23/528 ,  H01L27/02 ,  H01L23/485 ,  H01L29/06 ,  H01L21/8238

CPC classification number: H01L23/5283 ,  H01L21/823871 ,  H01L23/485 ,  H01L27/0207 ,  H01L29/0653

Abstract: A semiconductor device includes a substrate including PMOSFET and NMOSFET regions, a first gate structure extending in a first direction and crossing the PMOSFET and NMOSFET regions, and a gate contact on and connected to the first gate structure, the gate contact being between the PMOSFET and NMOSFET regions, the gate contact including a first sub contact in contact with a top surface of the first gate structure, the first sub contact including a vertical extending portion extending vertically toward the substrate along one sidewall of the first gate structure, and a second sub contact spaced apart from the first gate structure, a top surface of the second sub contact being positioned at a same level as a top surface of the first sub contact.

公开(公告)号：US20210257470A1

公开(公告)日：2021-08-19

申请号：US17224269

申请日：2021-04-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Deok Han BAE ,  Hyung Jong LEE ,  Hyun Jin KIM

IPC: H01L29/417 ,  H01L27/088 ,  H01L29/06 ,  H01L29/78 ,  H01L27/092 ,  H01L27/12 ,  H01L29/66 ,  H01L21/8234 ,  H01L27/11

Abstract: A semiconductor device includes a source/drain region in a fin-type active pattern, a gate structure adjacent to the source/drain region, and an insulating layer on the source/drain region and the gate structure. A shared contact plug penetrates through the insulating layer and includes a first lower portion connected to the source/drain region, a second lower portion connected to the gate structure, and an upper portion connected to upper surfaces of the first lower portion and the second lower portion. A plug spacer film is between the insulating layer and at least one of the first lower portion and the second lower portion and includes a material different from a material of the insulating layer.

公开(公告)号：US20190148384A1

公开(公告)日：2019-05-16

申请号：US15983405

申请日：2018-05-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Deokhan BAE ,  Hyonwook RA ,  Hyung Jong LEE ,  Juhun PARK

IPC: H01L27/11 ,  G11C11/412 ,  H01L23/522

Abstract: A semiconductor device includes a substrate including active patterns, a device isolation layer filling a trench between a pair of adjacent active patterns, a gate electrode on the active patterns, and a gate contact on the gate electrode. Each active pattern includes source/drain patterns at opposite sides of the gate electrode. The gate contact includes a first portion vertically overlapping with the gate electrode, and a second portion laterally extending from the first portion such that the second portion vertically overlaps with the device isolation layer and does not vertically overlap with the gate electrode. A bottom surface of the second portion is distal to the substrate in relation to a bottom surface of the first portion. The bottom surface of the second portion is distal to the substrate in relation to a top of a source/drain pattern that is adjacent to the second portion.

公开(公告)号：US20190229121A1

公开(公告)日：2019-07-25

申请号：US16374363

申请日：2019-04-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangyoung Kim ,  Hyung Jong LEE ,  Deokhan BAE

IPC: H01L27/11 ,  H01L23/528 ,  H01L23/522

Abstract: Disclosed is a semiconductor device including a first active pattern and a second active pattern that extend in a first direction on a substrate and are spaced apart from each other in a second direction crossing the first direction, a first gate structure that extends across the first and second active patterns, a second gate structure that is spaced apart from the first gate structure, and a node contact between the first and second gate structures that electrically connects the first active pattern and the second active pattern to each other. The node contact comprises a first end adjacent to the first active pattern and a second end adjacent to the second active pattern. The second end of the node contact being shifted in the first direction relative to the first end of the node contact so as to be closer to the second gate structure than to the first gate structure.

公开(公告)号：US20180315762A1

公开(公告)日：2018-11-01

申请号：US15842056

申请日：2017-12-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangyoung Kim ,  Hyung Jong LEE ,  Deokhan BAE

IPC: H01L27/11 ,  H01L23/528 ,  H01L23/522

Abstract: Disclosed is a semiconductor device including a first active pattern and a second active pattern that extend in a first direction on a substrate and are spaced apart from each other in a second direction crossing the first direction, a first gate structure that extends across the first and second active patterns, a second gate structure that is spaced apart from the first gate structure, and a node contact between the first and second gate structures that electrically connects the first active pattern and the second active pattern to each other. The node contact comprises a first end adjacent to the first active pattern and a second end adjacent to the second active pattern. The second end of the node contact being shifted in the first direction relative to the first end of the node contact so as to be closer to the second gate structure than to the first gate structure.