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公开(公告)号：US20230046782A1
公开(公告)日：2023-02-16
申请号：US17700879
申请日：2022-03-22
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jongho Park , Un-Byoung Kang , Sechul Park , Hyojin Yun , Ju-Il Choi , Atsushi Fujisaki
IPC: H01L25/065 , H01L21/02 , H01L21/56 , H01L25/00
Abstract: Disclosed are semiconductor packages and their fabrication methods. The semiconductor package comprises a substrate that includes a plurality of vias, a first chip stack on the substrate and including a plurality of first semiconductor chips that are sequentially stacked on the substrate, and a plurality of first non-conductive layers between the substrate and the first chip stack and between neighboring first semiconductor chips. Each of the first non-conductive layers includes first extensions that protrude outwardly from first lateral surfaces of the first semiconductor chips. The more remote the first non-conductive layers are from the substrate, the first extensions protrude a shorter length from the first lateral surfaces of the first semiconductor chips.
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公开(公告)号：US12044974B2
公开(公告)日：2024-07-23
申请号：US17569556
申请日：2022-01-06
Applicant: Samsung Electronics Co., Ltd.
Inventor： Hyojin Yun , Seungwon Kim , Taeyoung Kim , Woojung Park , Jinhye Bae , Hyunseop Shin , Mintae Lee , Hoon Han , Moonyoung Kim , Moonchang Kim , Cheolmo Yang , Yunseok Choi
CPC classification number: G03F7/425 , B08B3/04 , C11D3/044 , H01L21/0206
Abstract: A photoresist-removing composition includes a polar organic solvent, an alkyl ammonium hydroxide, an aliphatic amine not including a hydroxy group, and a monovalent alcohol. To manufacture a semiconductor device, a photoresist pattern may be formed on a substrate, and the photoresist-removing composition may then be applied to the photoresist pattern. To manufacture a semiconductor package, a photoresist pattern including a plurality of via holes may be formed on a substrate. A plurality of conductive posts including a metal may be formed inside the plurality of via holes, and the photoresist pattern may be removed by applying a photoresist-removing composition of the inventive concept to the photoresist pattern. A semiconductor chip may be adhered to the substrate between the respective conductive posts.
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3.发明授权Method of forming fine patterns in an anti-reflection layer for use as a patterning hard mask 有权在防反射层中形成精细图案以用作图案化硬掩模的方法公开(公告)号：US09570304B2
公开(公告)日：2017-02-14
申请号：US14965255
申请日：2015-12-10
Applicant: Samsung Electronics Co., Ltd.
Inventor： Min Ju Park , Haisub Na , Hyojin Yun , Kyoungseon Kim , Su Min Kim , Hyunwoo Kim , Su-min Park , So-Ra Han
IPC: H01L21/033 , H01L21/027
CPC classification number: H01L21/0337 , H01L21/0273 , H01L21/0276 , H01L21/0332 , H01L21/0338 , H01L21/31138 , H01L21/31144
Abstract: Provided is a method of fabricating a semiconductor device. The method includes forming an anti-reflection layer on a lower layer, forming photoresist patterns on the anti-reflection layer, forming protection patterns to cover the photoresist patterns, respectively, etching the anti-reflection layer using the photoresist patterns covered with the protection patterns as an etch mask to form anti-reflection patterns, forming spacers to cover sidewalls of the anti-reflection patterns, and removing the anti-reflection patterns.
Abstract translation: 提供一种制造半导体器件的方法。 该方法包括在下层上形成抗反射层，在抗反射层上形成光致抗蚀剂图案，分别形成保护图案以覆盖光致抗蚀剂图案，使用被保护图案覆盖的光刻胶图案蚀刻抗反射层 作为蚀刻掩模以形成抗反射图案，形成隔离物以覆盖抗反射图案的侧壁，以及去除防反射图案。
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公开(公告)号：US20160293417A1
公开(公告)日：2016-10-06
申请号：US14965255
申请日：2015-12-10
Applicant: Samsung Electronics Co., Ltd.
Inventor： Min Ju Park , Haisub Na , Hyojin Yun , Kyoungseon Kim , Su Min Kim , Hyunwoo Kim , Su Min Park , So-Ra Han
IPC: H01L21/033 , H01L21/027
CPC classification number: H01L21/0337 , H01L21/0273 , H01L21/0276 , H01L21/0332 , H01L21/0338 , H01L21/31138 , H01L21/31144
Abstract: Provided is a method of fabricating a semiconductor device. The method includes forming an anti-reflection layer on a lower layer, forming photoresist patterns on the anti-reflection layer, forming protection patterns to cover the photoresist patterns, respectively, etching the anti-reflection layer using the photoresist patterns covered with the protection patterns as an etch mask to form anti-reflection patterns, forming spacers to cover sidewalls of the anti-reflection patterns, and removing the anti-reflection patterns.
Abstract translation: 提供一种制造半导体器件的方法。 该方法包括在下层上形成抗反射层，在抗反射层上形成光致抗蚀剂图案，分别形成保护图案以覆盖光致抗蚀剂图案，使用被保护图案覆盖的光刻胶图案蚀刻抗反射层 作为蚀刻掩模以形成抗反射图案，形成隔离物以覆盖抗反射图案的侧壁，以及去除防反射图案。
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Patent Agency Ranking
公开(公告)号：US12176313B2
公开(公告)日：2024-12-24
申请号：US17652782
申请日：2022-02-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyoungjoo Lee , Unbyoung Kang , Sechul Park , Sangsick Park , Hyojin Yun , Teakhoon Lee , Juil Choi
IPC: H01L23/00 , H01L25/065
Abstract: A semiconductor package includes: a first semiconductor chip; a second semiconductor chip stacked on the first semiconductor chip; an underfill material layer interposed between the first semiconductor chip and the second semiconductor chip; and a first dam structure disposed on the first semiconductor chip. The first dam structure extends along an edge of the second semiconductor chip and includes unit dam structures apart from each other with a slit therebetween. A vertical level of an upper surface of the first dam structure is located between a vertical level of a lower surface of the second semiconductor chip and a vertical level of an upper surface of the second semiconductor chip. A first sidewall of the first dam structure is in contact with the underfill material layer and includes a flat surface parallel to a sidewall of the second semiconductor chip that faces the first sidewall of the first dam structure.
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公开(公告)号：US20240088094A1
公开(公告)日：2024-03-14
申请号：US18314287
申请日：2023-05-09
Applicant: Samsung Electronics Co., Ltd.
Inventor： Hyojin Yun , Unbyoung Kang , Seokbong Park , Sechul Park , Junyoung Park , Teahwa Jeong , Juil Choi
IPC: H01L25/065 , H01L23/00 , H01L23/31 , H01L23/498 , H01L23/538
CPC classification number: H01L25/0655 , H01L23/3157 , H01L23/49816 , H01L23/5383 , H01L23/5387 , H01L24/16 , H01L2224/16227
Abstract: A semiconductor package includes a substrate including a first region, a second region in contact with the first region with the first and second regions stacked in a first direction, and a third region extending from the first and second regions in a second direction, perpendicular to the first direction, to connect the first and second regions to each other in bent form, a first semiconductor chip on a first side opposite to a second side of the first region in contact with the second region, a second semiconductor chip on a first side opposite to a second side of the second region in contact with the first region, a first molding member on the first region and covering at least a portion of the first semiconductor chip, and a second molding member on the second region and covering at least a portion of the second semiconductor chip.
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公开(公告)号：US20230038603A1
公开(公告)日：2023-02-09
申请号：US17810036
申请日：2022-06-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Juil Choi , Unbyoung Kang , Sechul Park , Hyojin Yun , Teahwa Jeong , Atsushi Fujisaki
Abstract: A semiconductor package includes a semiconductor chip including a second bonding insulating layer surrounding at least a portion of each of a first bonding pad structure and a second bonding pad structure, in which the first bonding pad structure includes a first contact portion, a first bonding pad, and a first seed layer disposed between the first bonding pad and the first contact portion and extending in a first direction, the second bonding pad structure includes a second contact portion, a second bonding pad, and a second seed layer disposed between the second bonding pad and the second contact portion and extending in the first direction, and the second bonding insulating layer is in contact with a side surface of each of the first and second seed layers and the first and second bonding pads.
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公开(公告)号：US20230011778A1
公开(公告)日：2023-01-12
申请号：US17652782
申请日：2022-02-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyoungjoo Lee , Unbyoung Kang , Sechul Park , Sangsick Park , Hyojin Yun , Teakhoon Lee , Juil Choi
IPC: H01L23/00 , H01L25/065
Abstract: A semiconductor package includes: a first semiconductor chip; a second semiconductor chip stacked on the first semiconductor chip; an underfill material layer interposed between the first semiconductor chip and the second semiconductor chip; and a first dam structure disposed on the first semiconductor chip. The first dam structure extends along an edge of the second semiconductor chip and includes unit dam structures apart from each other with a slit therebetween. A vertical level of an upper surface of the first dam structure is located between a vertical level of a lower surface of the second semiconductor chip and a vertical level of an upper surface of the second semiconductor chip. A first sidewall of the first dam structure is in contact with the underfill material layer and includes a flat surface parallel to a sidewall of the second semiconductor chip that faces the first sidewall of the first dam structure.
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9.发明授权公开(公告)号：US09158204B2
公开(公告)日：2015-10-13
申请号：US13962173
申请日：2013-08-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Chawon Koh , Su Min Kim , Hyunwoo Kim , Hyojin Yun
Abstract: A photolithographic rinse solution includes deionized water, and a surfactant, the surfactant including a cyclic amine group and at least one non-amine cyclic group joined to or fused with the cyclic amine group, wherein the cyclic amine group includes a ring having a carbon number of 4 to 6, and the non-amine cyclic group includes a ring having a carbon number of 5 to 8.
Abstract translation: 光刻冲洗液包括去离子水和表面活性剂，所述表面活性剂包括环胺基团和至少一个与环胺基团连接或稠合的非胺环状基团，其中所述环胺基团包括具有碳数的环 为4〜6，非胺环基包括碳数为5〜8的环。
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