公开(公告)号：US20190373730A1

公开(公告)日：2019-12-05

申请号：US16207339

申请日：2018-12-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byung-guk SEO ,  Sun-ki YUN ,  Su-jin KIM ,  Hwi-jong YOO ,  Young-rok OH

IPC: H05K1/18 ,  H05K1/11 ,  G11C5/04

Abstract: A memory system includes a printed circuit board, at least one memory chip mounted on the printed circuit board, and a memory controller arranged on the printed circuit board and connected to 2N (where N is an integer of 2 or more) channels, the memory controller configured to perform a write operation and a read operation on the at least one memory chip. In the printed circuit board, a first subset of the channels corresponds to a first channel group configured in a point to point topology, and a remaining subset of the channels corresponds to a second channel group configured in a daisy chain topology.

公开(公告)号：US20210022249A1

公开(公告)日：2021-01-21

申请号：US17060833

申请日：2020-10-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byung-guk SEO ,  Sun-ki YUN ,  Su-jin KIM ,  Hwi-jong YOO ,  Young-rok OH

IPC: H05K1/18 ,  H05K1/11 ,  G11C5/04

Abstract: A memory system includes a printed circuit board, at least one memory chip mounted on the printed circuit board, and a memory controller arranged on the printed circuit board and connected to 2N (where N is an integer of 2 or more) channels, the memory controller configured to perform a write operation and a read operation on the at least one memory chip. In the printed circuit board, a first subset of the channels corresponds to a first channel group configured in a point to point topology, and a remaining subset of the channels corresponds to a second channel group configured in a daisy chain topology.

公开(公告)号：US20170048970A1

公开(公告)日：2017-02-16

申请号：US15093111

申请日：2016-04-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Iksung Park ,  Heeyoub KANG ,  Young-Min KIM ,  Eunji YOU ,  Hwi-jong YOO

IPC: H05K1/02 ,  H01L25/18 ,  G11C5/00 ,  H01L23/60 ,  G11C5/02 ,  H01L25/065 ,  H01L23/538

CPC classification number: H05K1/0259 ,  G11C5/005 ,  G11C5/025 ,  G11C5/04 ,  H01L23/5386 ,  H01L23/60 ,  H01L25/0655 ,  H01L25/18 ,  H05K1/0268 ,  H05K3/0052 ,  H05K2201/10159

Abstract: Disclosed is a printed circuit hoard. The printed circuit board includes a plurality of insulation layers and a plurality of pattern layers alternately stacked, The printed circuit board includes a plurality of device areas on which semiconductor packages are mounted and a peripheral area adjacent the device areas. An electrostatic discharge pattern is in a respective pattern layer among the plurality of pattern layers and is disposed at a boundary region between a respective device area of the plurality of device areas and the peripheral area.

Abstract translation: 公开了印刷电路板。 印刷电路板包括交替堆叠的多个绝缘层和多个图案层。印刷电路板包括多个装配区域，半导体封装件安装在该区域上以及与该区域相邻的外围区域。 静电放电图案位于多个图案层中的各图案层中，并且设置在多个器件区域的各个器件区域与周边区域之间的边界区域。