公开(公告)号：US09911659B2

公开(公告)日：2018-03-06

申请号：US15189312

申请日：2016-06-22

申请人： Samsung Electronics Co., Ltd.

发明人： Chul Woong Lee ,  Hanseung Kwak ,  Youngmook Oh

IPC分类号： H01L21/8234 ,  H01L29/06 ,  H01L27/11

CPC分类号： H01L21/823481 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823462 ,  H01L21/823468 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/0886 ,  H01L27/1104 ,  H01L29/0649

摘要： Semiconductor devices and methods of fabricating the same are provided. The semiconductor devices may include gate electrodes on a substrate. A longitudinal direction of each of the gate electrodes may extend in a first direction, and ones of the gate electrodes may be arranged in the first direction. The semiconductor devices may also include first and second gate spacers extending in the first direction and on respective sidewalls of the ones of the gate electrodes. The first and second gate spacers may be spaced apart from each other in a second direction that is different from the first direction. The semiconductor devices may further include gate separation patterns, and ones of the gate separation patterns may be between two among the ones of the gate electrodes adjacent to each other in the first direction and between the first and second gate spacers.

公开(公告)号：US11610898B2

公开(公告)日：2023-03-21

申请号：US17237208

申请日：2021-04-22

申请人： Samsung Electronics Co., Ltd.

发明人： Hyun-Chul Yoon ,  Sungun Kwon ,  Hanseung Kwak ,  Jihee Kim ,  Sunghoon Choi

IPC分类号： H01L27/108

摘要： Disclosed are semiconductor devices and their fabrication methods. The method includes forming an etching target on a substrate including cell and key regions, forming lower and upper mask layers on the etching target, performing photolithography to form an upper mask pattern including a hole on the cell region, a preliminary key pattern on the key region, a bar pattern on the key region, and a trench between the preliminary key pattern and the bar pattern, forming pillar and dam patterns filling the hole and the trench, performing photolithography to remove the upper mask pattern except for the bar pattern, using the pillar pattern, the dam pattern, and the bar pattern as an etching mask to form a lower mask pattern, and using the lower mask pattern as an etching mask to form an etching target pattern on the cell region and a key pattern on the key region.

公开(公告)号：US10418284B2

公开(公告)日：2019-09-17

申请号：US15882190

申请日：2018-01-29

申请人： Samsung Electronics Co., Ltd.

发明人： Chul Woong Lee ,  Hanseung Kwak ,  Youngmook Oh

IPC分类号： H01L21/8234 ,  H01L29/06 ,  H01L27/088 ,  H01L27/11 ,  H01L27/02

摘要： Semiconductor devices and methods of fabricating the same are provided. The semiconductor devices may include gate electrodes on a substrate. A longitudinal direction of each of the gate electrodes may extend in a first direction, and ones of the gate electrodes may be arranged in the first direction. The semiconductor devices may also include first and second gate spacers extending in the first direction and on respective sidewalls of the ones of the gate electrodes. The first and second gate spacers may be spaced apart from each other in a second direction that is different from the first direction. The semiconductor devices may further include gate separation patterns, and ones of the gate separation patterns may be between two among the ones of the gate electrodes adjacent to each other in the first direction and between the first and second gate spacers.