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公开(公告)号:US20230236964A1
公开(公告)日:2023-07-27
申请号:US18049380
申请日:2022-10-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dongki KIM , IIkueon Kang , Gwang-Ok Go , Junseok Park
IPC: G06F12/02 , G06F12/0891
CPC classification number: G06F12/0246 , G06F12/0891
Abstract: Disclosed is a method of operating a storage controller, the storage controller communicating with a host and a non-volatile memory device. The method includes receiving a first erase request from the host, the first erase request being for a first zone of a plurality of zones of the non-volatile memory device, loading first allocation list information of the first zone from an allocation list table based on the first erase request, deallocating memory blocks allocated to the first zone based on the first allocation list information, wherein sequential physical page numbers of the memory blocks are respectively mapped onto sequential logical page numbers, and providing the non-volatile memory device with a physical erase request for the deallocated memory blocks of the first zone.
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公开(公告)号:US20240322849A1
公开(公告)日:2024-09-26
申请号:US18305738
申请日:2023-04-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jungsik KIM , Dongki KIM , Seongkyun KIM , Hyohyun NAM , Daeyoung LEE , Chaejun LEE
Abstract: A communication device configured to transmit/receive a radio frequency (RF) signal is provided. The device includes a transceiver including an amplifier device using a multi-loop inter-stage matching (ISM) transformer, and a processor configured to control an operation of the amplifier based on a signal strength during transmission/reception of the RF signal. The transformer is disposed between a first amplifier and a second amplifier and includes a plurality of primary loops and a plurality of secondary loops, each primary loop includes an inductor component having a different size and a different Q-factor and each secondary loop includes an inductor component having a different size and a different Q-factor. The processor adjusts an attenuation level of the transformer by controlling a switching connection to the first amplifier and the second amplifier for one primary loop among the plurality of primary loops and one secondary loop among the plurality of secondary loops.
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公开(公告)号:US20200242825A1
公开(公告)日:2020-07-30
申请号:US16774081
申请日:2020-01-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dohyeon KIM , Dongki KIM
Abstract: An electronic device and method are disclosed herein. The electronic device includes: a processor, and a memory operatively connected to the processor. The processor implements the method, including: receive an input of handwritten text including characters, set corpus line key points indicating a substantial-top positions of the characters included in the handwritten text and base line key points indicating a substantial bottom positions of the characters, calculate at least a first feature value based on at least one corpus line key point from among the corpus line key points, and a second feature value based on at least one extracted base line key point from among the base line key points, respectively, input the calculated first feature value into a first neural network to cause the first neural network to generate a first result value, input the calculated second feature value into a second neural network to cause the second neural network to generate a second result value, and input the first result value and the second result value into a fully connected neural network to generate a third result value.
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公开(公告)号:US20230378943A1
公开(公告)日:2023-11-23
申请号:US18156106
申请日:2023-01-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyeongjin KIM , Hyohyun NAM , Dongki KIM , Dae Young LEE
CPC classification number: H03K5/00006 , H03K17/56
Abstract: The present disclosure relates to a communication method and system for converging a 5th-Generation (5G) communication system or a 6th-Generation (6G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system. A frequency multiplier of a wireless communication system is provided. The frequency multiplier includes an input circuit to which a local oscillator (LO) signal is input, a multiplier circuit having one end connected to the input circuit and another end connected to a lower terminal of a load circuit, a load circuit having an upper terminal connected to a voltage controller, and a voltage controller configured between the upper terminal of the load circuit and an input power source, wherein the voltage controller may be configured to drop a voltage between the input power source and the upper terminal of the load circuit and reinput a feedback voltage based on an upper terminal voltage of the load circuit to the voltage controller, and a method of multiplying a frequency using the same.
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