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    SEMICONDUCTOR MEMORY DEVICE
    1.
    发明公开
    SEMICONDUCTOR MEMORY DEVICE 审中-公开

    公开(公告)号：US20240147709A1

    公开(公告)日：2024-05-02

    申请号：US18403817

    申请日：2024-01-04

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Dong Oh Kim ,  Gyu Hyun Kil ,  Jung Hoon Han ,  Doo San Back

    IPC: H10B12/00

    CPC classification number: H10B12/50 ,  H10B12/315 ,  H10B12/34

    Abstract: A semiconductor memory device includes a substrate including a cell region, a core region, and a boundary region between the cell region and the core region, a boundary element isolation layer in the boundary region, the boundary element isolation layer being in a boundary element isolation recess and including first and second boundary liner layers extending along a profile of the boundary element isolation recess and a first gate structure on the core region and at least a part of the boundary element isolation layer, wherein the first gate structure includes a first high dielectric layer, and a first gate insulating pattern below the first high dielectric layer, with a top surface of the substrate being a base reference level, the first gate insulating pattern does not overlap a top surface of the first boundary liner layer, and wherein the first gate insulating pattern includes a first_1 gate insulating pattern between a top surface of the second boundary liner layer and a bottom surface of the first high dielectric layer, and a first_2 gate insulating pattern disposed a top surface of the core region and a bottom surface of the first high dielectric layer.

    Semiconductor device
    2.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US10283360B2

    公开(公告)日：2019-05-07

    申请号：US15886372

    申请日：2018-02-01

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Chan Sic Yoon ,  Ki Seok Lee ,  Dong Oh Kim ,  Yong Jae Kim

    IPC: H01L21/027 ,  G03F1/38 ,  H01L21/02 ,  H01L27/02 ,  H01L27/108

    Abstract: Methods for manufacturing a semiconductor device include forming a gate line extending in a first direction in a substrate, and an impurity region on a side surface of the gate line, forming an insulating film pattern on the substrate, the insulating film pattern extending in the first direction and comprising a first through-hole that is configured to expose the impurity region, forming a barrier metal layer on the first through-hole, forming a conductive line contact that fills the first through-hole and that is electrically connected to the impurity region, forming a first mask pattern on the conductive line contact and the insulating film pattern, the first mask pattern extending in a second direction that is different from the first direction and the first mask pattern comprising a first opening, and removing corners of the barrier metal layer by partially etching the barrier metal layer.

    Method for manufacturing semiconductor device
    3.
    发明授权
    Method for manufacturing semiconductor device 有权

    公开(公告)号：US10026614B2

    公开(公告)日：2018-07-17

    申请号：US15291415

    申请日：2016-10-12

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Chan Sic Yoon ,  Ki Seok Lee ,  Dong Oh Kim

    IPC: H01L21/027 ,  H01L21/033 ,  H01L21/308 ,  H01L21/3213 ,  H01L21/8234

    Abstract: A method for manufacturing a semiconductor device includes forming features of a first mold pattern on a substrate including a first region and a second region, and forming a first insulation layer covering the first mold pattern from the first region to the second region. The method further includes forming a photoresist pattern on the first insulation layer in the second region, forming a second insulation layer covering the first insulation layer in the first region and the photoresist pattern in the second region from the first region to the second region, etching the second insulation layer, removing the photoresist pattern, and forming a first double patterning technology pattern having a first width in the first region and a second DPT pattern having a second width in the second region, wherein the second width is different from the first width.

    Semiconductor memory device
    6.
    发明授权
    Semiconductor memory device 有权

    公开(公告)号：US12185528B2

    公开(公告)日：2024-12-31

    申请号：US18403817

    申请日：2024-01-04

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Dong Oh Kim ,  Gyu Hyun Kil ,  Jung Hoon Han ,  Doo San Back

    IPC: H10B12/00

    Abstract: A semiconductor memory device includes a substrate including a cell region, a core region, and a boundary region between the cell region and the core region, a boundary element isolation layer in the boundary region, the boundary element isolation layer being in a boundary element isolation recess and including first and second boundary liner layers extending along a profile of the boundary element isolation recess and a first gate structure on the core region and at least a part of the boundary element isolation layer, wherein the first gate structure includes a first high dielectric layer, and a first gate insulating pattern below the first high dielectric layer, with a top surface of the substrate being a base reference level, the first gate insulating pattern does not overlap a top surface of the first boundary liner layer, and wherein the first gate insulating pattern includes a first_1 gate insulating pattern between a top surface of the second boundary liner layer and a bottom surface of the first high dielectric layer, and a first_2 gate insulating pattern disposed a top surface of the core region and a bottom surface of the first high dielectric layer.

    Touch pen for an electronic device
    7.
    发明授权
    Touch pen for an electronic device 有权

    公开(公告)号：US11747918B2

    公开(公告)日：2023-09-05

    申请号：US17678465

    申请日：2022-02-23

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jong Pil Seo ,  Dong Keun Kang ,  Dong Oh Kim ,  Sung Jun Kim ,  You Sub Lee ,  Yoong-Kwan Cho

    IPC: G06F3/0354

    CPC classification number: G06F3/03545

    Abstract: The disclosure relates to a touch pen capable of being used in electronic devices. The touch pen includes a pen body having an accommodation space extending in a longitudinal direction, a pen tip coupled to one end of the pen body, a plurality of weight members disposed inside the accommodation space of the pen body, and a buffer material disposed between adjacent weight members among the plurality of weight members to prevent movement of the plurality of weight members in the longitudinal direction.

    SEMICONDUCTOR MEMORY DEVICE
    8.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权

    公开(公告)号：US20220173112A1

    公开(公告)日：2022-06-02

    申请号：US17406418

    申请日：2021-08-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Dong Oh Kim ,  Gyu Hyun Kil ,  Jung Hoon Han ,  Doo San Back

    IPC: H01L27/108

    Abstract: A semiconductor memory device includes a substrate including a cell region, a core region, and a boundary region between the cell region and the core region, a boundary element isolation layer in the boundary region, the boundary element isolation layer being in a boundary element isolation recess and including first and second boundary liner layers extending along a profile of the boundary element isolation recess and a first gate structure on the core region and at least a part of the boundary element isolation layer, wherein the first gate structure includes a first high dielectric layer, and a first gate insulating pattern below the first high dielectric layer, with a top surface of the substrate being a base reference level, the first gate insulating pattern does not overlap a top surface of the first boundary liner layer, and wherein the first gate insulating pattern includes a first_1 gate insulating pattern between a top surface of the second boundary liner layer and a bottom surface of the first high dielectric layer, and a first_2 gate insulating pattern disposed a top surface of the core region and a bottom surface of the first high dielectric layer.

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